DatasheetsPDF.com

XC95288XV

Xilinx
Part Number XC95288XV
Manufacturer Xilinx
Description High-Performance CPLD
Published Apr 16, 2005
Detailed Description 0 R XC95288XV High-Performance CPLD 0 5 DS050 (v2.2) August 27, 2001 Advance Product Specification Features • • 288...
Datasheet PDF File XC95288XV PDF File

XC95288XV
XC95288XV

Overview
0 R XC95288XV High-Performance CPLD 0 5 DS050 (v2.
2) August 27, 2001 Advance Product Specification Features • • 288 macrocells with 6,400 usable gates Available in small footprint packages - 144-pin TQFP (117 user I/O pins) - 208-pin PQFP (168 user I/O pins) - 280-pin CSP (192 user I/O pins) - 256-pin FBGA (192 user I/O pins) Optimized for high-performance 2.
5V systems - Low power operation - Multi-voltage operation Advanced system features - In-system programmable - Four separate output banks - Superior pin-locking and routability with FastCONNECT II™ switch matrix - Extra wide 54-input Function Blocks - Up to 90 product-terms per macrocell with individual product-term allocation - Local clock inversion with three global and one product-term clocks - Individual output enable per output pin - Input hysteresis on all user and boundary-scan pin inputs - Bus-hold ciruitry on all user pin inputs - Full IEEE Standard 1149.
1 boundary-scan (JTAG) Fast concurrent programming Slew rate control on individual outputs Enhanced data security features Excellent quality and reliability - Endurance exceeding 10,000 program/erase cycles - 20 year data retention - ESD protection exceeding 2,000V Power Estimation Power dissipation in CPLDs can vary substantially depending on the system frequency, design application and output loading.
To help reduce power dissipation, each macrocell in a XC9500XV device may be configured for low-power mode (from the default high-performance mode).
In addition, unused product-terms and macrocells are automatically deactivated by the software to further conserve power.
For a general estimate of ICC, the following equation may be used: ICC (mA) = MCHP(0.
36) + MCLP(0.
23) + MC(0.
005 mA/MHz) f Where: MCHP = Macrocells in high-performance (default) mode MCLP = Macrocells in low-power mode MC = Total number of macrocells used f = Clock frequency (MHz) This calculation is based on typical operating conditions using a pattern of 16-bit up/down counters in...


Similar Datasheet


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)