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X25320

Xicor
Part Number X25320
Manufacturer Xicor
Description SPI Serial E2PROM With Block LockTM Protection
Published Apr 16, 2005
Detailed Description APPLICATION NOTE A V A I L A B L E X25320 32K AN61 X25320 SPI Serial E2PROM With Block LockTM Protection DESCRIPTION ...
Datasheet PDF File X25320 PDF File

X25320
X25320

Overview
APPLICATION NOTE A V A I L A B L E X25320 32K AN61 X25320 SPI Serial E2PROM With Block LockTM Protection DESCRIPTION 4K x 8 Bit FEATURES • 2MHz Clock Rate • SPI Modes (0,0 & 1,1) • 4K X 8 Bits — 32 Byte Page Mode • Low Power CMOS — <1µA Standby Current — <5mA Active Current During Write • 2.
7V To 5.
5V Power Supply • Block Lock Protection — Protect 1/4, 1/2 or all of E2PROM Array • Built-in Inadvertent Write Protection — Power-Up/Power-Down protection circuitry — Write Enable Latch — Write Protect Pin • Self-Timed Write Cycle — 5ms Write Cycle Time (Typical) • High Reliability — Endurance: 100,000 cycles — Data Retention: 100 Years — ESD protection: 2000V on all pins • 8-Lead PDlP Package • 8-Lead SOIC Package • 14-Lead TSSOP Package FUNCTIONAL DIAGRAM STATUS REGISTER WRITE PROTECT LOGIC The X25320 is a CMOS 32768-bit serial E2PROM, internally organized as 4K x 8.
The X25320 features a Serial Peripheral Interface (SPI) and software protocol allowing operation on a simple three-wire bus.
The bus signals are a clock input (SCK) plus separate data in (SI) and data out (SO) lines.
Access to the device is controlled through a chip select (CS) input, allowing any number of devices to share the same bus.
The X25320 also features two additional inputs that provide the end user with added flexibility.
By asserting the HOLD input, the X25320 will ignore transitions on its inputs, thus allowing the host to service higher priority interrupts.
The WP input can be used as a hardwire input to the X25320 disabling all write attempts to the status register, thus providing a mechanism for limiting end user capability of altering 0, 1/4, 1/2 or all of the memory.
The X25320 utilizes Xicor’s proprietary Direct Write™ cell, providing a minimum endurance of 100,000 cycles and a minimum data retention of 100 years.
X DECODE LOGIC 32 4K BYTE ARRAY 32 X 256 SO SI SCK CS HOLD COMMAND DECODE AND CONTROL LOGIC 32 32 X 256 64 64 X 256 WP WRITE CONTROL AND TIMING LOGIC 32 8 Y DECODE D...


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