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X28HT512

Xicor
Part Number X28HT512
Manufacturer Xicor
Description High Temperature/ 5 Volt/ Byte Alterable E2PROM
Published Apr 16, 2005
Detailed Description X28HT512 512K X28HT512 High Temperature, 5 Volt, Byte Alterable E2PROM 64K x 8 Bit FEATURES • 175°C Full Functionalit...
Datasheet PDF File X28HT512 PDF File

X28HT512
X28HT512

Overview
X28HT512 512K X28HT512 High Temperature, 5 Volt, Byte Alterable E2PROM 64K x 8 Bit FEATURES • 175°C Full Functionality DESCRIPTION The X28HT512 is an 64K x 8 CMOS E2PROM, fabricated with Xicor’s proprietary, high performance, floating gate CMOS technology which provides Xicor products superior high temperature performance characteristics.
Like all Xicor programmable nonvolatile memories the X28HT512 is a 5V only device.
The X28HT512 features the JEDEC approved pinout for bytewide memories, compatible with industry standard EPROMS.
The X28HT512 supports a 128-byte page write operation, effectively providing a 39µs/byte write cycle and enabling the entire memory to be written in less than 2.
5 seconds.
• • Simple Byte and Page Write —Single 5V Supply —Self-Timed —No Erase Before Write —No Complex Programming Algorithms —No Overerase Problem Highly Reliable Direct Write™ Cell —Endurance: 10,000 Write Cycles —Data Retention: 100 Years —Higher Temperature Functionality is Possible by Operating in the Byte Mode PIN CONFIGURATION FLAT PACK CERDIP SOIC (R) VBB NC A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 X28HT512 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC WE NC A14 A13 A8 A9 A11 OE A10 CE I/O7 I/O6 I/O5 I/04 I/O3 6 A12 5 A15 NC 2 V 3 BB 8 A1 13 A2 12 A4 10 A6 PGA I/O0 I/O2 I/O3 I/O5 I/O6 15 17 19 21 22 A0 14 A3 11 A5 A7 CE I/O1 VSS I/O4 I/O7 16 18 20 23 24 A10 25 OE 26 A9 28 A13 30 A14 31 X28HT512 (BOTTOM VIEW) 9 A11 27 A8 29 7 VCC NC 36 34 NC 1 WE 35 NC 32 NC 33 NC 4 6614 FHD F23 6614 FHD F02.
1 © Xicor, Inc.
1991, 1995, 1996 Patents Pending 6614-1.
5 8/5/97 T2/C0/D0 EW 1 Characteristics subject to change without notice X28HT512 PIN DESCRIPTIONS Addresses (A0–A15) The Address inputs select an 8-bit memory location during a read or write operation.
Chip Enable (CE) The Chip Enable input must be LOW to enable all read/ write operations.
When CE is HIGH, power consumption is reduced.
Output Enable (O...


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