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TDA8707

NXP
Part Number TDA8707
Manufacturer NXP
Description Triple RGB 6-bit video analog-to-digital interface
Published Apr 16, 2005
Detailed Description INTEGRATED CIRCUITS DATA SHEET TDA8707 Triple RGB 6-bit video analog-to-digital interface Product specification Superse...
Datasheet PDF File TDA8707 PDF File

TDA8707
TDA8707

Overview
INTEGRATED CIRCUITS DATA SHEET TDA8707 Triple RGB 6-bit video analog-to-digital interface Product specification Supersedes dat of March 1995 File under Integrated Circuits, IC02 1996 Feb 01 Philips Semiconductors Product specification Triple RGB 6-bit video analog-to-digital interface FEATURES • Triple analog-to-digital converter (ADC) • 6-bit resolution • Sampling rate up to 35 MHz • Power dissipation of 335 mW (typical) • Internal clamping function • TTL compatible digital inputs • −40 to +85 °C operating temperature • CMOS digital outputs.
APPLICATIONS • High-speed analog-to-digital conversion for video signals • VGA signal treatment.
DESCRIPTION The TDA8707 is a CMOS triple 6-bit video low-power analog-to-digital converter (ADC) for RGB signals.
QUICK REFERENCE DATA SYMBOL VDDA VDDD IDDA IDDD INL DNL EB fclk Ptot Notes PARAMETER analog supply voltage digital supply voltage analog supply current digital supply current integral non-linearity differential non-linearity effective bits maximum clock conversion rate total power dissipation fclk = 35 MHz; note 2 fclk = 35 MHz fclk = 35 MHz; ramp input; Tamb = 25 °C fclk = 35 MHz; ramp input; Tamb = 25 °C note 1 CONDITIONS MIN.
4.
5 4.
5 − − − − − 35 − TYP.
5.
0 5.
0 60 5 ±0.
35 ±0.
35 5.
3 − 335 TDA8707 It converts the analog inputs into 6-bit binary coded digital words at a sampling rate of 35 MHz.
All analog signal inputs are clamped.
Analog-to-digital converter The TDA8707 implements 3 independent 6-bit analog-to-digital converters in CMOS process.
These converters use a full-flash approach.
Clamping feature An internal clamping circuit is provided in each of the 3 analog channels.
The analog pins INR, ING and INB are switched, through series capacitors, to on-chip clamping levels during an active pulse on the clamp input CLP.
Clamping level in the R, G and B channels is Code 0.
Input buffers Internal buffers are provided to drive the analog-to-digital converter inputs.
Their ratio can be adjusted externally at 1.
5 or...


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