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SLA24C04

Siemens Semiconductor Group
Part Number SLA24C04
Manufacturer Siemens Semiconductor Group
Description 4 Kbit 512 x 8 bit Serial CMOS EEPROMs/ I2C Synchronous 2-Wire Bus/ Page Protection Mode
Published Apr 16, 2005
Detailed Description Standard EEPROM ICs SLx 24C04 4 Kbit (512 × 8 bit) Serial CMOS-EEPROM with I2C Synchronous 2-Wire Bus Data Sheet 1998-0...
Datasheet PDF File SLA24C04 PDF File

SLA24C04
SLA24C04

Overview
Standard EEPROM ICs SLx 24C04 4 Kbit (512 × 8 bit) Serial CMOS-EEPROM with I2C Synchronous 2-Wire Bus Data Sheet 1998-07-27 SLx 24C04 Revision History: Previous Version: Page Page (in previous (in current Version) Version) 3 4, 5 5 5 11, 12 15 19 20 20 20 I2C Bus Current Version: 1998-07-27 06.
97 Subjects (major changes since last revision) 3 4, 4 – 5 11, 12 15 19 20 20 20 Text was changed to “Typical programming time 5 ms for up to 16 bytes”.
CS0, CS1 and CS2 were replaced by n.
c.
The paragraph “Chip Select (CS0, CS1, CS2)” was removed completely.
WP = VCC protects the upper half entire memory.
The erase/write cycle is finished latest after 10 8 ms.
Figure 11: second command byte is a CSR and not CSW.
“Capacitive load …” were added.
Some timings were changed.
The line “erase/write cycle” was removed.
Chapter 7.
4 “Erase and Write Characteristics” has been added.
Purchase of Siemens I2C components conveys the license under the Philips I2C patent to use the components in the I2C sy...


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