DatasheetsPDF.com

PALCE22V10

Lattice Semiconductor
Part Number PALCE22V10
Manufacturer Lattice Semiconductor
Description 24-Pin EE CMOS (Zero Power) Versatile PAL Device
Published Mar 22, 2005
Detailed Description PALCE22V10 COM'L: H-5/7/10/15/25,Q-10/15/25 IND: H-10/15/20/25 PALCE22V10Z COM'L: -25 IND: -15/25 PALCE22V10 and PALCE2...
Datasheet PDF File PALCE22V10 PDF File

PALCE22V10
PALCE22V10


Overview
PALCE22V10 COM'L: H-5/7/10/15/25,Q-10/15/25 IND: H-10/15/20/25 PALCE22V10Z COM'L: -25 IND: -15/25 PALCE22V10 and PALCE22V10Z Families 24-Pin EE CMOS (Zero Power) Versatile PAL Device DISTINCTIVE CHARACTERISTICS x As fast as 5-ns propagation delay and 142.
8 MHz fMAX (external) x Low-power EE CMOS x 10 macrocells programmable as registered or combinatorial, and active high or active low to match application needs x Varied product term distribution allows up to 16 product terms per output for complex x x x x x x functions Peripheral Component Interconnect (PCI) compliant (-5/-7/-10) Global asynchronous reset and synchronous preset for initialization Power-up reset for initialization and register preload for testability Extensive third-party software and programmer support 24-pin SKINNY DIP, 24-pin SOIC, and 28-pin PLCC 5-ns and 7.
5-ns versions utilize split leadframes for improved performance GENERAL DESCRIPTION The PALCE22V10 provides user-programmable logic for replacing conventional SSI/MSI gates and flip-flops at a reduced chip count.
The PALCE22V10Z is an advanced PAL® device built with zero-power, high-speed, electricallyerasable CMOS technology.
It provides user-programmable logic for replacing conventional zeropower CMOS SSI/MSI gates and flip-flops at a reduced chip count.
The PALCE22V10Z provides zero standby power and high speed.
At 30 µA maximum standby current, the PALCE22V10Z allows battery-powered operation for an extended period.
The PAL device implements the familiar Boolean logic transfer function, the sum of products.
The PAL device is a programmable AND array driving a fixed OR array.
The AND array is programmed to create custom product terms, while the OR array sums selected terms at the outputs.
The product terms are connected to the fixed OR array with a varied distribution from 8 to16 across the outputs (see Block Diagram).
The OR sum of the products feeds the output macrocell.
Each macrocell can be programmed as registered or combinatorial, and a...


Similar Datasheet


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)