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IDT74LVCH2244A

Integrated Device
Part Number IDT74LVCH2244A
Manufacturer Integrated Device
Description 3.3V CMOS OCTAL BUFFER/DRIVER WITH 3- STATE OUTPUTS/ 5 VOLT TOLERANT I/O/ BUS-HOLD
Published Apr 17, 2005
Detailed Description IDT74LVC2244A 3.3V CMOS OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS OCTAL BUFFER/D...
Datasheet PDF File IDT74LVCH2244A PDF File

IDT74LVCH2244A
IDT74LVCH2244A

Overview
IDT74LVC2244A 3.
3V CMOS OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.
3V CMOS OCTAL BUFFER/DRIVER WITH 3STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD • 0.
5 MICRON CMOS Technology • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.
3V ± 0.
3V, Normal Range • VCC = 2.
7V to 3.
6V, Extended Range • CMOS power levels (0.
4µ W typ.
static) • Rail-to-rail output swing for increased noise margin • All inputs, outputs, and I/O are 5V tolerant • Supports hot insertion • Available in QSOP and TSSOP packages IDT74LVCH2244A FEATURES: DESCRIPTION: DRIVE FEATURES: APPLICATIONS: • Balanced Output Drivers: ±12mA • Low switching noise This octal buffer/driver is built using advanced dual metal CMOS technology.
The LVCH2244A device is organized as two 4-bit line drivers with separate output-enable (OE) inputs.
When OE is low, the device passes data from the A inputs to the Y outputs.
When OE is high, the outputs are in the high-impedance state.
The LVCH2244A has series resistors in the device output structure which will significantly reduce line noise when used with light loads.
This driver has been designed to drive ±12mA at the designated threshold levels.
Inputs can be driven from either 3.
3V or 5V devices.
This feature allows the use of this device as a translator in a mixed 3.
3V/5V system environment.
The LVCH2244A has “bus-hold” which retains the inputs’ last state whenever the input goes to a high impedance.
This prevents floating inputs and eliminates the need for pull-up/down resistors.
• 5V and 3.
3V mixed voltage systems • Data communication and telecommunication systems FUNCTIONAL BLOCK DIAGRAM 1OE 1 2OE 19 1A1 2 18 1Y1 2A1 11 9 2Y1 1A2 4 16 1Y2 2A2 13 7 2Y2 1A3 6 14 1Y3 2A3 15 5 2Y3 1A4 8 12 1Y4 2A4 17 3 2Y4 The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE 1 © 2004 Integrated Device Technology, Inc.
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