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IL4117

Siemens Semiconductor Group
Part Number IL4117
Manufacturer Siemens Semiconductor Group
Description ZERO VOLTAGE CROSSING TRIAC DRIVER OPTOCOUPLER
Published Apr 17, 2005
Detailed Description IL4116 700 V IL4117 800 V IL4118 600 V FEATURES • High Input Sensltlvity: IFT=1.3 mA, PF=1.0; IFT=3.5 mA, Typlcal PF < 1...
Datasheet PDF File IL4117 PDF File

IL4117
IL4117

Overview
IL4116 700 V IL4117 800 V IL4118 600 V FEATURES • High Input Sensltlvity: IFT=1.
3 mA, PF=1.
0; IFT=3.
5 mA, Typlcal PF < 1.
0 • Zero Voltage Crosslng • 600/700/800 V Blocklng Voltage • 300 mA On-State Current • High Statlc dv/dt 10,000 V/µsec.
, typical • Inverse Parallel SCRs Provide Commutatlng dv/dt >10 KV/msec.
• Very Low Leakage <10 mA • Isolation Test Voltage from Double Molded Package 5300 VACRMS • Package, 6-Pln DIP • Underwriters Lab File #E52744 DESCRIPTION The IL411x consists of an AlGaAs IRLED optically coupled to a photosensitive zero crossing TRIAC network.
The TRIAC consists of two inverse parallel connected monolithic SCRs.
These three semiconductors are assembled in a six pin 0.
3 inch dual inline package, using high insulation double molded, over/under leadframe construction.
High input sensitivity is achieved by using an emitter follower phototransistor and a cascaded SCR predriver resulting in an LED trigger current of less than 1.
3 mA(DC).
The IL411x uses two discrete SCRs resulting in a commutating dV/dt greater than 10 KV/ms The use of a proprietary dv/dt clamp results in a static dv/dt of greater than 10 KV/µs.
This clamp circuit has a MOSFET that is enhanced when high dv/dt spikes occur between MT1 and MT2 of the TRIAC.
When conducting, the FET clamps the base of the phototransistor, disabling the first stage SCR predriver.
The zero cross line voltage detection circuit consists of two enhancement MOSFETS and a photodiode.
The inhibit voltage of the network is determined by the enhancement voltage of the Nchannel FET.
The P-channel FET is enabled by a photocurrent source that permits the FET to conduct the main voltage to gate on the N-channel FET.
Once the main voltage can enable the N-channel, it clamps the base of the phototransistor, disabling the first stage SCR predriver.
The blocking voltage of up to 800 V permits control of off-line voltages up to 240 VAC, with a safety factor of more than two, and is sufficient for as much as 380 VAC.
Curren...


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