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TC74VHCT245AF

Toshiba
Part Number TC74VHCT245AF
Manufacturer Toshiba
Description Octal Bus Transceiver
Published Apr 23, 2005
Detailed Description TC74VHCT245AF/AFK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHCT245AF, TC74VHCT245AFK Octal Bus Tra...
Datasheet PDF File TC74VHCT245AF PDF File

TC74VHCT245AF
TC74VHCT245AF


Overview
TC74VHCT245AF/AFK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHCT245AF, TC74VHCT245AFK Octal Bus Transceiver The TC74VHCT245A is an advanced high speed CMOS OCTAL BUS TRANSCEIVER fabricated with silicon gate C2MOS technology.
It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.
It is intended for two-way asynchronous communication between data busses.
The direction of data transmission is determined by the level of the DIR input.
The enable input ( G ) can be used to disable the device so that the busses are effectively isolated.
The input voltage are compatible with TTL output voltage.
This device may be used as a level converter for interfacing 3.
3 V to 5 V system.
Input protection and output circuit ensure that 0 to 5.
5 V can be applied to the input and output (Note) pins without regard to the supply voltage.
These structure prevents device destruction due to mismatched supply and input/output voltages such as battery back up, hot board insertion, etc.
Note: Output in off-state TC74VHCT245AF TC74VHCT245AFK Features (Note)  High speed: tpd = 4.
9 ns (typ.
) at VCC = 5 V Weight SOP20-P-300-1.
27A: VSSOP20-P-0030-0.
50:  Low power dissipation: ICC = 4 A (max) at Ta = 25°C  Compatible with TTL inputs: VIL = 0.
8 V (max) VIH = 2.
0 V (min)  Power down protection is provided on all inputs and outputs  Balanced propagation delays: tpLH  tpHL  Low noise: VOLP = 1.
5 V (max)  Pin and function compatible with the 74 series (74AC/HC/F/ALS/LS etc.
) 245 type.
0.
22 g (typ.
) 0.
03 g (typ.
) Note: Do not apply a signal to any bus terminal when it is in the output mode.
Damage may result.
All floating (high impedance) bus terminals must have their input levels fixed by means of pull up or pull down resistors.
© 2019 1 Toshiba Electronic Devices & Storage Corporation Start of commercial production 1995-12 2019-01-31 Pin Assignment DIR 1 A1 2 A2 3 A3 4 A4 5 A5 6 A6 7...



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