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LC89051V

Sanyo
Part Number LC89051V
Manufacturer Sanyo
Description Digital Audio Interface Receiver
Published Apr 25, 2005
Detailed Description Ordering number : EN*5543 CMOS LSI LC89051V Digital Audio Interface Receiver Preliminary Overview The LC89051V is for ...
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LC89051V
LC89051V

Overview
Ordering number : EN*5543 CMOS LSI LC89051V Digital Audio Interface Receiver Preliminary Overview The LC89051V is for use in IEC958 format data transmission between digital audio equipment.
This LSI is used on the receiving side, and handles synchronization with the input signal and demodulation of that signal to a normal format signal.
Package Dimensions unit: mm 3175A-SSOP24 [LC89051V] Features • On-chip PLL circuit synchronizes with the transmitted IEC958 format signal.
• Low-voltage operation (3.
3 V) • Provides 128fs, bit, and L/R clock outputs.
• System clock can be selected to be either 384fs or 512fs.
• Microcontroller interface code settings for different output types — Input pin, emphasis output, input bi-phase data output, and validity flag output settings — Audio data output format setting — Channel status output (32-bit output for consumer products) — Subcode Q output with CRC flags (80 bits) — Start ID and shortening (skip) ID detection for DAT with subcodes • The built-in VCO can receive at speeds up to twice fs only when operating from a 5-V power supply.
• Miniature package: SSOP-24 SANYO: SSOP24 SANYO Electric Co.
,Ltd.
Semiconductor Bussiness Headquarters TOKYO OFFICE Tokyo Bldg.
, 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN N3097HA (OT) No.
5543-1/15 LC89051V Pin Assignment Pin Functions Pin No.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Symbol DIN1 DIN2 E/DOUT VDD R VIN VCO GND CKSEL XMODE AVOCK TEST1 TEST2 SCLK/CL XLAT/CE SWDT/DI SRDT/DO DQSY/LD CKOUT FS128 BCK LRCK DATAOUT ERROR I/O I I O – I I O – I I I I I I I I O O O O O O O O Description Data input with built-in amplifier (for coaxial or optical module input) Data input (for optical module input) Emphasis, input bi-phase, and validity flag output Power supply VCO gain control input VCO free-running setting input PLL low-pass filter setting Ground System clock selection input (384fs or 512fs) Reset input PLL error lock avoidance clock input Test input (Must be c...


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