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PEEL18CV8JI-25

Part Number	PEEL18CV8JI-25
Manufacturer	ETC
Description	CMOS Programmable Electrically Erasable Logic Device
Published	Mar 22, 2005
Detailed Description	® International CMOS Technology Commercial/ Industrial PEEL™ 18CV8 -5/-7/-10/-15/-25 CMOS Programmable Electrically E...
Datasheet	PEEL18CV8JI-25 PDF File

Overview

® International CMOS Technology Commercial/ Industrial PEEL™ 18CV8 -5/-7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic Device Features s Multiple Speed Power, Temperature Options - VCC = 5 Volts ±10% - Speeds ranging from 5ns to 25 ns - Power as low as 37mA at 25MHz - Commercial and industrial versions available CMOS Electrically Erasable Technology - Superior factory testing - Reprogrammable in plastic package - Reduces retrofit and development costs Development / Programmer Support - Third party software and programmers - ICT PLACE Development Software and PDS-3 programmer - PLD-to-PEEL JEDEC file translator s Architectural Flexibility - Enhanced architecture fits in more logic - 74 product terms x 36 input AND array - 10 inputs and 8 I/O pins - 12 possible macrocell configurations - Asynchronous clear - Independent output enables -- 20 Pin DIP/SOIC/TSSOP and PLCC s s Application Versatility - Replaces random logic - Super sets PLDs (PAL, GAL, EPLD) - Enhanced Architecture fits more logic than ordinary PLDs General Description The PEEL18CV8 is a Programmable Electrically Erasable Logic (PEEL) device providing an attractive alternative to ordinary PLDs.
The PEEL18CV8 offers the performance, flexibility, ease of design and production practicality needed by logic designers today.
The PEEL18CV8 is available in 20-pin DIP, PLCC, SOIC and TSSOP packages with speeds ranging from 5ns to 25ns with power consumption as low as 37mA.
EE-Reprogrammability provides the convenience of instant reprogramming for development and reusable production inventory minimizing the impact of programming changes or errors.
EE-Reprogrammability also improves factory testability, thus assuring the highest quality possible.
The PEEL18CV8 architecture allows it to replace over 20 standard 20-pin PLDs (PAL, GAL, EPLD etc.
).
It also provides additional architecture features so more logic can be put into every design.
ICT’s JEDEC file translator instantly converts to the PEEL18...

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