MITSUBISHIAna. INTERFACE>
M62352P,FP,GP
8-BIT 12CH D-A CONVERTER WITH BUFFER AMPLIFIERS
DESCRIPTION
The M62352 is an integrated circuit semiconductor of CMOS structure with 12 channels of built-in D-A converters with output buffer operational amplifiers. The 3-wire serial interface method is used for the transfer format mum wiring. It is able to cascading serial use with Do terminal. The output buffer operational amplifier operates in the whole voltage range from power supply to ground for both input/output.
PIN CONFIGURATION (TOP VIEW)
Vss 1 (VrefL) Ao3 2 Ao4 Ao5 Ao6
3 4 5 6 7 8 20 19 18 17 16 15 14 13 12 11
GND Ao2 Ao1 DI CLK LD DO Ao12 Ao11 Vcc
FEATURES
•12bit serial data input(3-wire serial data transfer method) •Highly stable output buffer operational amplifier allow operation in the all voltage range from power supply to ground.
Ao7 Ao8 Ao9
Ao10 9 VDD 10 (VrefU)
APPLICATION
Adjustment/control of industrial or home-use electronic equipment,such as VTR camera,VTR set,TV,and CRT display.
Outline 20P4B(P) 20P2N-A(FP) 20P2E-A(GP)
BLOCK DIAGRAM
GND Ao2 Ao1 DI CLK LD Do Ao12 Ao11 Vcc
20
19
8-BIT R-2R D-A
Ch2 1
18
-
17
16
15
14
13
-
12
D-A
11
11
12-BIT SHIFT REGISTER D-A
D0 1 2 3 4 5 6 D7 D8 9 10 D11
D-A
12
8-BIT LATCH (12)
L (8) (12) ADDRESS DECODER
L
L
(12)
8-BIT LATCH
Ch3 4
L
5
L
6
L
7
L
8
L
9
L
10
L D-A -
8-BIT R-2R D-A BUFFER OP AMP -
D-A -
D-A -
D-A -
D-A -
D-A -
D-A -
1
Vss (VrefL)
2
Ao3
3
Ao4
4
Ao5
5
Ao6
6
Ao7
7
Ao8
8
Ao9
9
Ao10
10
VDD (VrefU)
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MITSUBISHIAna. INTERFACE>
M62352P,FP,GP
8-BIT 12CH D-A CONVERTER WITH BUFFER AMPLIFIERS
EXPLANATION OF TERMINALS
Pin No. 17 14 16 15 18 19 2 3 4 5 6 7 8 9 12 13 11 20 10 1 Symbol DI DO CLK LD Ao1 Ao2 Ao3 Ao4 Ao5 Ao6 Ao7 Ao8 Ao9 Ao10 Ao11 Ao12 Vcc GND VDD Vss Function Serial data input terminal Serial data output terminal Serial clock input terminal LD terminal input high level than latch circuit data load
8-bit D-A c...
M62352GP PDF File
