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M74HC112

ST Microelectronics
Part Number M74HC112
Manufacturer ST Microelectronics
Description DUAL J-K FLIP FLOP WITH PRESET AND CLEAR
Published May 6, 2005
Detailed Description M54HC112 M74HC112 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR . . . . . . . . HIGH SPEED fMAX = 67 MHz (TYP.) AT VCC = 5 ...
Datasheet PDF File M74HC112 PDF File

M74HC112
M74HC112

Overview
M54HC112 M74HC112 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR .
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HIGH SPEED fMAX = 67 MHz (TYP.
) AT VCC = 5 V LOW POWER DISSIPATION ICC = 2 µA AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.
) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL = 4 mA (MIN.
) BALANCED PROPAGATION DELAYS tPLH = tPHL WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V PIN AND FUNCTION COMPATIBLE WITH 54/74LS112 B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) ORDER CODES : M54HC112F1R M74HC112M1R M74HC112B1R M74HC112C1R DESCRIPTION The M54/74HC112 is a high speed CMOS DUAL J-K FLIP-FLOP WITH PRESET AND CLEAR fabricated in silicon gate C2MOS technology.
It has the same high speed performance of LSTTL combined with true CMOS low power consumption.
The M54HC112/M74HC112 dual JK flip-flop features individual J,K, clock, and asynchronous set and clearinputs for each flip-flop.
When the clock goes high, the inputs are ...


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