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80960CF-16

Intel Corporation
Part Number 80960CF-16
Manufacturer Intel Corporation
Description SPECIAL ENVIRONMENT 80960CF-30/ -25/ -16 32-BIT HIGH-PERFORMANCE SUPERSCALAR PROCESSOR
Published Mar 22, 2005
Detailed Description A www.DataSheet4U.com PRELIMINARY 80960CF-40, -33, -25, -16 32-BIT HIGH-PERFORMANCE SUPERSCALAR EMBEDDED MICROPROCESS...
Datasheet PDF File 80960CF-16 PDF File

80960CF-16
80960CF-16

Overview
A www.
DataSheet4U.
com PRELIMINARY 80960CF-40, -33, -25, -16 32-BIT HIGH-PERFORMANCE SUPERSCALAR EMBEDDED MICROPROCESSOR • Socket and Object Code Compatible with 80960CA • Two Instructions/Clock Sustained Execution • Four 71 Mbytes/s DMA Channels with Data Chaining • Demultiplexed 32-Bit Burst Bus with Pipelining 32-Bit Parallel Architecture s Four On-Chip DMA Channels — Two Instructions/clock Execution — 71 Mbytes/s Fly-by Transfers — Load/Store Architecture — 40 Mbytes/s Two-Cycle Transfers — Sixteen 32-Bit Global Registers — Data Chaining — Sixteen 32-Bit Local Registers — Data Packing/Unpacking — Manipulates 64-Bit Bit Fields — Programmable Priority Method — 11 Addressing Modes s 32-Bit Demultiplexed Burst Bus — Full Parallel Fault Model — 128-Bit Internal Data Paths to and from — Supervisor Protection Model Registers Fast Procedure Call/Return Model — Burst Bus for DRAM Interfacing — Address Pipelining Option — Full Procedure Call in 4 Clocks — Fully Programmable Wait States On-Chip Register Cache — Supports 8-, 16- or 32-Bit Bus Widths — Caches Registers on Call/Ret — Supports Unaligned Accesses — Minimum of 6 Frames Provided — Supervisor Protection Pin — Up to 15 Programmable Frames s High-Speed Interrupt Controller On-Chip Instruction Cache — Up to 248 External Interrupts — 4 Kbyte Two-Way Set Associative — 32 Fully Programmable Priorities — 128-Bit Path to Instruction Sequencer — Multi-mode 8-Bit Interrupt Port — Cache-Lock Modes — Four Internal DMA Interrupts — Cache-Off Mode — Separate, Non-maskable Interrupt Pin High Bandwidth On-Chip Data RAM — Context Switch in 625 ns Typical — 1 Kbyte On-Chip Data RAM s On-Chip Data Cache — Sustains 128 bits per Clock Access — 1 Kbyte Direct-Mapped, Write Through Selectable Big or Little Endian Byte — 128 bits per Clock Access on Cache Hit Ordering s s s s s s © INTEL CORPORATION, 1996 June 1996 Order Number: 272886-001 www.
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com Information in this document is provided in connection with Intel p...


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