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MX8335MC

Part Number	MX8335MC
Manufacturer	Macronix International
Description	RAMBUS CLOCK GENERATOR
Published	May 9, 2005
Detailed Description	INDEX PRELIMINARY MX8335 RAMBUS CLOCK GENERATOR FEATURES • Clock generator for RambusTM Channel • Provide two Rambus in...
Datasheet	MX8335MC PDF File

Overview

INDEX PRELIMINARY MX8335 RAMBUS CLOCK GENERATOR FEATURES • Clock generator for RambusTM Channel • Provide two Rambus interface-level outputs with frequency from 200MHz to 267MHz • Multiplication ratio 40/3 allows low cost crystal used as frequency reference • Provide chip output enable pin (EN) for tri-state control • 3.
0V~3.
6V power supply range • 8-pin SOP (150mil) package GENERAL DESCRIPTION The MX8335 is a clock synthesizer chip for Rambus channel.
With an advanced phase locked loop technology, the MX8335 provides two clock outputs (CLKOUT) with frequency ranging from 200MHz to 267MHz.
The desired high speed clock is the 40/3 Multiplication ratio of a reference input clock.
The reference clock could be supplied by an external crystal ranging from 15MHz to 20MHz.
PIN CONFIGURATIONS 8-PIN SOP PIN DESCRIPTION SYMBOL PIN TYPE PIN NUMBER EN I 1 DESCRIPTION When high, CLKOUTs are enabled.
When low, CLKOUTs are tristate.
EN XO XI GND 1 2 3 4 8 VDD CLKOUT GND CLKOUT XO XI GND CLKOUT O GND CLKOUT O VDD O I 2 3 4 5 6 7 8 MX8335 7 6 5 With an internal pull high resistor.
Crystal output pin.
Crystal input pin.
Ground.
200-267Mhz output.
Ground.
200-267Mhz output.
Power supply.
BLOCK DIAGRAM DIVIDER ÷40 200MHz~267MHz XO 15MHz~20MHz XI OSC DIVIDER ÷3 PFC CHARGE PUMP VCO 200MHz~267MHz VDD LOOP FILTER EN Rambus and P/N: PM0334 are trademarks of Rambus Inc.
REV.
1.
4, APR.
15, 1996 1 INDEX MX8335 FUNCTIONAL DESCRIPTION The Rambus clock generator is an integrated circuit of the phase locked loop frequency synthesizer.
It provides two clock outputs for dual Rambus channel systems.
As shown in the block diagram, a phase locked loop consists of dividers, phase frequency comparator(PFC), charge pump, voltage controlled oscillator(VCO), and loop filter.
All components for PLL are integrated inside the chip.
The dividers provide a fixed multiplication ratio 40/3.
When a reference clock, ranging from 15MHz to 20MHz and either coming from crystal or external s...

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