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NS32FX100-15

National
Part Number NS32FX100-15
Manufacturer National
Description System Controller
Published May 9, 2005
Detailed Description NS32FX100-15 NS32FX100-20 NS32FV100-20 NS32FV100-25 NS32FX200-20 NS32FX200-25 System Controller PRELIMINARY July 1992 ...
Datasheet PDF File NS32FX100-15 PDF File

NS32FX100-15
NS32FX100-15


Overview
NS32FX100-15 NS32FX100-20 NS32FV100-20 NS32FV100-25 NS32FX200-20 NS32FX200-25 System Controller PRELIMINARY July 1992 NS32FX100-15 NS32FX100-20 NS32FV100-20 NS32FV100-25 NS32FX200-20 NS32FX200-25 System Controller General Description The NS32FX200 NS32FV100 and NS32FX100 are highly integrated system chips designed for a FAX system based on National Semiconductor’s embedded processors NS32FX161 NS32FV16 or NS32FX164 The NS32FX100 is the common core for all three system chips The NS32FV100 and NS32FX200 offer additional functions Throughout this document references to the NS32FX100 also apply to both the NS32FV100 and the NS32FX200 Specific NS32FV100 or NS32FX200 features are explicitly indicated The NS32FX200 NS32FV100 and NS32FX100 feature an interface to devices like stepper motors printers and scanners a Sigma-Delta CODEC an elapsed-time counter a DMA controller an interrupt controller and a UART The NS32FX200 is optimized for high-end FAX applications such as plain-paper FAX and multifunctional peripherals The NS32FX100 is optimized for low-cost FAX applications The NS32FV100 is optimized for thermal paper FAX machines with Digital Answering Machine support Y Y Y Y Y Y Y Features Y Y Y Y Y Y Direct interface to the NS32FX161 NS32FV16 and NS32FX164 embedded processors Supports a variety of Contact Image Sensor (CIS) and Charge Coupled Device (CCD) scanners Direct interface to a variety of Thermal Print Head (TPH) printers Bitmap shifter and DMA channels facilitate the connection of other types of printers Supports two stepper motors Direct interface to ROM and SRAM The NS32FX200 and NS32FV100 in addition interface to DRAM devices Y Y Y Y Y Programmable wait state generator Demultiplexed address and data buses Multiplexed DRAM address bus (NS32FX200 and NS32FV100) Supports 3V freeze mode by maintaining only elapsed time counter Control of power consumption by disabling inactive modules and reducing the clock frequency Operating frequency Normal mode...



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