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NE27200

NEC
Part Number NE27200
Manufacturer NEC
Description C to Ka BAND SUPER LOW NOISE AMPLIFIER N-CHANNEL HJ-FET CHIP
Published May 12, 2005
Detailed Description DATA SHEET HETERO JUNCTION FIELD EFFECT TRANSISTOR NE32500, NE27200 C to Ka BAND SUPER LOW NOISE AMPLIFIER N-CHANNEL H...
Datasheet PDF File NE27200 PDF File

NE27200
NE27200

Overview
DATA SHEET HETERO JUNCTION FIELD EFFECT TRANSISTOR NE32500, NE27200 C to Ka BAND SUPER LOW NOISE AMPLIFIER N-CHANNEL HJ-FET CHIP DESCRIPTION NE32500 and NE27200 are Hetero Junction FET chip that utilizes the hetero junction between Si-doped AlGaAs and undoped InGaAs to create high mobility electrons.
Its excellent low noise and high associated gain make it suitable for commercial systems, industrial and space applications.
FEATURES • Super Low Noise Figure & High Associated Gain NF = 0.
45 dB TYP.
, Ga = 12.
5 dB TYP.
at f = 12 GHz • Gate Length : Lg = 0.
2 µm • Gate Width : Wg = 200 µm ORDERING INFORMATION PART NUMBER NE32500 NE27200 Standard (Grade D) Special, specific (Grade C and B) QUALITY GRADE ABSOLUTE MAXIMUM RATINGS (TA = 25 ˚C) Drain to Source Voltage Gate to Source Voltage Drain Current Total Power Dissipation Channel Temperature Storage Temperature VDS VGS ID Ptot* Tch Tstg 4.
0 –3.
0 IDSS 200 175 –65 to +175 V V mA mW °C °C * Chip mounted on a Alumina heatsink (size: 3 × 3 × 0.
6t) ELECTRICAL CHARACTERISTICS (TA = 25 ˚C) PARAMETER Gate to Source Leak Current Saturated Drain Current Gate to Source Cutoff Voltage Transconductance Thermal Resistance Noise Figure Associated Gain SYMBOL IGSO IDSS VGS(off) gm Rth* NF Ga MIN.
– 20 –0.
2 45 – – 11.
0 TYP.
0.
5 60 –0.
7 60 – 0.
45 12.
5 MAX.
10 90 –2.
0 – 260 0.
55 – UNIT TEST CONDITIONS VGS = –3 V VDS = 2 V, VGS = 0 V VDS = 2 V, ID = 100 µA VDS = 2 V, ID = 10 mA channel to case VDS = 2 V, ID = 10 mA, f = 12 GHz µA mA V mS ˚C/W dB dB RF performance is determined by packaging and testing 10 chips per wafer.
Wafer rejection criteria for standard devices is 2 rejects per 10 samples.
Document No.
P11512EJ2V0DS00 (2nd edition) Date Published January 1997 N Printed in Japan © 1996 NE32500, NE27200 CHIP DIMENSIONS (Unit: µm) 5.
5 36.
5 13 58 66 25 13 25 76.
5 89 Drain 350 Source Source 100.
5 Gate 25 21 25 13 66 49.
5 43 350 Thickness = 140 µm : BONDING AREA TYPICAL CHARACTERISTICS (TA = 25 ˚C) TOTAL POWER ...


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