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MB86H20

Fujitsu
Part Number MB86H20
Manufacturer Fujitsu
Description SmartMPEG
Published May 12, 2005
Detailed Description Product Profile MB86H20 INTRODUCTION: This SmartMPEG is an integrated MPEG-2 settop-box decoder which includes the hardw...
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MB86H20
MB86H20

Overview
Product Profile MB86H20 INTRODUCTION: This SmartMPEG is an integrated MPEG-2 settop-box decoder which includes the hardware extensions required to support a low Bill of Material for Set-TopBoxes and IDTVs.
Highlights of the SmartMPEG include an ARC RISC CPU (@130.
5MHz), two transport stream demultiplexers with integrated DVB descramblers, a PAL/ NTSC/SECAM digital video encoder and a display controller, which overlays up to four layers of graphic data.
A specially designed, shared SDRAM memory interface for the CPU and MPEG decoder connects to a single SDRAM device using either a 16 or 32-bit data bus depending on customer bandwidth requirements.
The included universal processor interface allows simple connection to FLASH, hard disk drives (IDE), Common Interface and other asynchronous devices.
The SmartMPEG is part of Fujitsu’s MPEG decoder family, and is the successor to the MB87L2250.
The SmartMPEG offers several advantages over the MB87L2250, including support for 16/32-bit SDRAM devices up to 128Mbytes, an integrated S/P-DIF interface, DPLL, and internal audio DAC’s.
This helps to reduce product cost by eliminating the need for external components.
The SmartMPEG adds also DPLL functionality, SECAM encoding, and two Smart-card interface to former MPEG devices.
To help our customers achieve the shortest possible timeto-market, the SmartMPEG comes with the Fujitsu Driver Application Programming Interface (FAPI).
FAPI is a complete driver set, allowing fast and efficient customer software design.
In addition, FAPI is now the standard programming interface for Fujitsu DVB components, easing migration to future devices.
Shared Memory S/P-DIF (Dolby Dig.
Bitstream) I2S (Audio) SmartMPEG FEATURES • • • • • • • • • • • • • • • • • • • • • • • • • • • • • November 2003 Edition 0.
55 FME/MM/PP/1103 MPEG-2 Decoder for Set-Top-Boxes MPEG2 video ISO/IEC 13818-2 (MP@ML.
.
.
SP@ML) MPEG audio layer 1/2 32-bit RISC CPU (ARC Tangent A4 @130.
5MHz) 4K I-cache, 2K D-cache Three tim...


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