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MC145201

Part Number	MC145201
Manufacturer	Motorola
Description	2.0 GHz PLL Frequency Synthesizers
Published	Jul 1, 2005
Detailed Description	MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MC145200/D 2.0 GHz PLL Frequency Synthesizers MC145200 ...
Datasheet	MC145201 PDF File

Overview

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MC145200/D 2.
0 GHz PLL Frequency Synthesizers MC145200 MC145201 Include On–Board 64/65 Prescalers The MC145200 and MC145201 are single–package synthesizers with serial interfaces capable of direct usage up to 2.
0 GHz.
A special architecture makes these PLLs very easy to program because a byte–oriented format is utilized.
Due to the patented BitGrabber™ registers, no address/steering bits are required for random access of the three registers.
Thus, tuning can be accomplished via a 3–byte serial transfer to the 24–bit A register.
The interface is both SPI and MICROWIRE™ compatible.
Each device features a single–ended current source/sink phase detector output and a double–ended phase detector output.
Both phase detectors have linear transfer functions (no dead zones).
The maximum current of the single–ended phase detector output is determined by an external resistor tied from the Rx pin to ground.
This current can be varied via the serial port.
The MC145200 features logic–level converters and high–voltage phase/ frequency detectors; the detector supply may range up to 9.
5 V.
The MC145201 has lower–voltage phase/frequency detectors optimized for single–supply systems of 5 V ± 10%.
Each part includes a differential RF input which may be operated in a single–ended mode.
Also featured are on–board support of an external crystal and a programmable reference output.
The R, A, and N counters are fully programmable.
The C register (configuration register) allows the parts to be configured to meet various applications.
A patented feature allows the C register to shut off unused outputs, thereby minimizing system noise and interference.
In order to have consistent lock times and prevent erroneous data from being loaded into the counters, on–board circuitry synchronizes the update of the A register if the A or N counters are loading.
Similarly, an update of the R register is synchronized if the R counter is loading...

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