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ETC8115

Micrel
Part Number ETC8115
Manufacturer Micrel
Description Microprocessor Reset Circuits
Published Jul 4, 2005
Detailed Description MIC8115 Micrel MIC8115 Microprocessor Reset Circuit Final Information General Description The MIC8115 is an inexpensi...
Datasheet PDF File ETC8115 PDF File

ETC8115
ETC8115

Overview
MIC8115 Micrel MIC8115 Microprocessor Reset Circuit Final Information General Description The MIC8115 is an inexpensive microprocessor supervisory circuit that monitors power supplies in microprocessor based systems.
The function of this device is to assert a reset if the power supply drops below a designated reset threshold level or /MR is forced low.
The MIC8115 has an active low /RESET output.
The reset output is guaranteed to remain asserted for a minimum of 1100ms after VCC has risen above the designated reset threshold level.
The MIC8115 comes in a 4-pin SOT-143 package.
Features • • • • • • • Precision voltage monitor for 3.
3V power supplies Specifically tailored to theAMD Elan SC500 Series /RESET remains valid with VCC as low as 1.
4V <15µA supply current 1100ms minimum reset pulse width Manual reset input Available in 4-Pin SOT-143 Package Applications • • • • • Portable equipment Intelligent instruments Critical microprocessor power monitoring Printers/computers Embedded controllers Ordering Information Part Number MIC8115TU Marking NT Operating Temp.
Range –40°C to +85°C Package 4-lead SOT-143 Typical Application VCC VCC MIC81 15 VCC µP MR RESET RESET Micrel, Inc.
• 1849 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 944-0970 • http://www.
micrel.
com May 2003 1 MIC8115 MIC8115 Micrel Pin Configuration GND 1 4 VCC MIC81 15 RESET 2 3 MR 4-Lead SOT-143 Pin Description Pin Number 1 2 Pin Name GND /RESET Pin Function IC Ground Pin /RESET goes low if either VCC falls below the supply reset threshold voltage or if /MR is asserted.
/RESET remains asserted for one reset timeout period 1100ms min.
After both VCC exceeds the supply reset threshold voltage and /MR is deasserted.
Manual Reset Input.
A logic low on /MR forces a reset.
The reset will remain asserted as long as /MR is held low and for one reset timeout period (1100ms min.
) after /MR goes high.
This input can be shorted to ground via a switch or drive...


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