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TB62715FN

Part Number	TB62715FN
Manufacturer	Toshiba
Description	8 BIT SHIFT REGISTER / LATCHES & CONSTANT CURRENT DRIVERS
Published	Aug 16, 2005
Detailed Description	TB62715FN TOSHIBA Bi−CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC TB62715FN 8 BIT SHIFT REGISTER, LATCHES & CONSTANT CURRE...
Datasheet	TB62715FN PDF File

Overview

TB62715FN TOSHIBA Bi−CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC TB62715FN 8 BIT SHIFT REGISTER, LATCHES & CONSTANT CURRENT DRIVERS The TB62715FN is specifically designed for LED and LED DISPLAY constant current drivers.
This constant current output circuits is able to set up external resistor (IOUT = 2~150 mA).
This IC is monolithic integrated circuit designed to be used together with Bi−CMOS process.
The devices consist of 8 bit shift register, latch, AND−GATE & Constant Current Drivers.
FEATURES Constant Current Output: Can set up all output current with one resistor for 80 to 150 mA.
Constant Output Current Matching : Weight: 0.
14 g (typ.
) HIGH / LOW “L” “H” OUTPUT−GND VOLTAGE ≥0.
7 V ≥1.
0 V CURRENT MATCHING (BIT) ±6.
0 % ±6.
0 % CURRENT MATCHING (LOT) ±15.
0 % ±15.
0 % OUTPUT CURRENT (MAX.
) 2~70 mA 50~150 mA Maximum Clock Frequency: fCLK = 15 MHz (Cascade Connected Operate, Topr = 25°C) 5 V C−MOS Compatible Input Package: SSOP20−P−225−0.
65A 1 2006-06-14 PIN CONNECTION (TOP VIEW) BLOCK DIAGRAM TB62715FN TRUTH TABLE CLOCK LATCH ENABLE SERIAL−IN OUT0 ··· OUT5 ··· OUT7 SERIAL−OUT UP UP UP DOWN DOWN H L H X X L Dn L Dn+1 L Dn+2 L Dn+3 H Dn+3 Dn ··· Dn−5 ··· Dn − 7 No Change Dn + 2 ··· Dn−3 ··· Dn−5 Dn + 2 ··· Dn−3 ··· Dn−5 Off Dn−7 Dn−6 Dn−5 Dn−5 Dn−5 Note: OUT0 ~ 7 = on in case of Dn = H level and OUT0 ~ 7 = off in case of Dn = level.
A resistor is connected with R−EXT and GND accompanied with outside, and it is necessary that a correct power supply voltage is supplied.
2 2006-06-14 TIMING DIAGRAM TB62715FN Note: Latches are level sensitive, not rising edge sensitive and not syncronus CLOCK.
Input of LATCH −terminal to H Level, data passes latches, and input to L level, data hold latches.
Input of ENABLE −terminal to H level, all output ( OUT0 ~ 7 ) do off.
TERMINAL DISCRIPTION PIN No.
5 6, 15 1 2 3 4 7~10, 11~14 16 18 17 19 20 PIN NAME FUNCTION HIGH / LOW POWER−GND LOGIC−GND SERIAL−IN CLOCK LATCH It is the terminal which does switchi...

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TB62715FN 8 BIT SHIFT REGISTER / LATCHES & CONSTANT CURRENT DRIVERS - Toshiba

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