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M5L2764K

Mitsubishi Electric
Part Number M5L2764K
Manufacturer Mitsubishi Electric
Description 64K-Bit Erasable and Electrically Reprogrammable ROM
Published Aug 25, 2005
Detailed Description MITSUBISHI LSls MSL2764K, -2 65536-BIT (8192-WORD BY 8-BIT) ERASABLE AND ELECTRICALLY REPROGRAMMABLE ROM DESCRIPTION Th...
Datasheet PDF File M5L2764K PDF File

M5L2764K
M5L2764K

Overview
MITSUBISHI LSls MSL2764K, -2 65536-BIT (8192-WORD BY 8-BIT) ERASABLE AND ELECTRICALLY REPROGRAMMABLE ROM DESCRIPTION The Mitsubishi M5L2764 K is a high-speed 65536-bit ultraviolet erasable and electrically reprogrammable read only memory.
It is suitable for microprocessor programming applications where rapid turn-around is required.
The M5L2764K is fabricated by N-channel double polysilicon gate technology and is available in a 28-pin DI L package with a transparent lid.
FEATURES • 8192 Word x 8-bit Organization • Access Time M5L2764K-2 200 ns (Max) M5L2764K 250 ns (Max) • Two Line Control OE, CE • Low Power Current (Icc) Active 150 rnA (Max) Standby .
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35 rnA (Max) • Single 5V Power Supply • 3-State Output Buffer • Input and Output TTL-Compatible in Read and Program Mode • Standard 28-pin DI L Package • Single Location Programming with One 50 ms Pulse • Fast programming algorithm • Interchangeable with INTE L 2764 PIN CONFIGURATION (TOP VIEW) (IV, 21V) Vpp ADDRESS INPUTS iIN~~Jtt Do 0I OUTPUTS 0, (OV) GND Vee (IV) 27 ~ PGM m~UGTRAM NC IADDRESS J INPUTS DUTPUT ENABLE INPUT ADDRESS INPUT CHIP ENABLE INPUT DATA INPUTS !OUTPUTS Outline 28K1 NC : NO CONNECTION BLOCK DIAGRAM ADDRESS INPUTS CHIP ENABLE INPUT OUTPUT ENABLE INPUT PROGRAM INPUT (SV) (SV, 21V) (OV) ~-----------~ X-DECODER I I8192 WORD _ X a-BIT ROM I V-DECODER V-GATING CI RCUIT I )------<1 CHIP EN~~RLEuIT I---~ 1)------<1 OUTPUT c~~~~~i I---~ )------<>1 PROGRA~~~~~T SENSE AMPLIFIERS AND OUTPUT BUFFERS I • MITSUBISHI "ELECTRIC 6-3 MITSUBISHI LSls MSL2764K, -2 6SS36-BIT (8192-WORD BY 8-BIT) ERASABLE AND ELECTRICAl.
LY REPROGRAMMABLE ROM FUNCTION Read Set the CE and OE terminals to the read mode (low level).
Low level input to CE and OE and address signals to the address inputs (Ao - A 12) make the data contents of the designated address location available at the data input/output (Do - 07).
When the CE or DE signal is high, data input/output are in a floating state.
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