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MC74VHC574

Motorola
Part Number MC74VHC574
Manufacturer Motorola
Description Octal D-Type Flip-Flop
Published Oct 12, 2005
Detailed Description MOTOROLA SEMICONDUCTOR TECHNICAL DATA Octal D-Type Flip-Flop with 3-State Output The MC74VHC574 is an advanced high sp...
Datasheet PDF File MC74VHC574 PDF File

MC74VHC574
MC74VHC574

Overview
MOTOROLA SEMICONDUCTOR TECHNICAL DATA Octal D-Type Flip-Flop with 3-State Output The MC74VHC574 is an advanced high speed CMOS octal flip–flip with 3–state output fabricated with silicon gate CMOS technology.
It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.
This 8–bit D–type flip–flop is controlled by a clock input and an output enable input.
When the output enable input is high, the eight outputs are in a high impedance state.
The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output.
The inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems.
• • • • • • • • • • • High Speed: fmax = 180MHz (Typ) at VCC = 5V Low Power Dissipation: ICC = 4µA (Max) at TA = 25°C High Noise Immunity: VNIH = VNIL = 28% VCC Power Down Protection Provided on Inputs Balanced Propagation Delays Designed for 2V to 5.
5V Operating Range Low Noise: VOLP = 1.
2V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300mA ESD Performance: HBM > 2000V; Machine Model > 200V Chip Complexity: 266 FETs or 66.
5 Equivalent Gates MC74VHC574 DW SUFFIX 20–LEAD SOIC PACKAGE CASE 751D–04 DT SUFFIX 20–LEAD TSSOP PACKAGE CASE 948E–02 M SUFFIX 20–LEAD SOIC EIAJ PACKAGE CASE 967–01 ORDERING INFORMATION MC74VHCXXXDW SOIC MC74VHCXXXDT TSSOP MC74VHCXXXM SOIC EIAJ LOGIC DIAGRAM D0 D1 D2 DATA INPUTS D3 D4 D5 D6 D7 CP 2 3 4 5 6 7 8 9 11 19 18 17 16 15 14 13 12 Q0 Q1 Q2 Q3 Q4 Q5 Q6 NONINVERTING OUTPUTS PIN ASSIGNMENT OE D0 D1 D2 D3 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 CP Q7 D4 D5 D6 OE 1 D7 GND FUNCTION TABLE INPUTS OE L L L H CP D H L X X OUTPUT Q H L No Change Z L, H, X 6/97 © Motorola, Inc.
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