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ICS507-xx

Integrated Circuit Systems
Part Number ICS507-xx
Manufacturer Integrated Circuit Systems
Description PECL Clock Synthesizer
Published Oct 16, 2005
Detailed Description ICS507-01/02 PECL Clock Synthesizer Description The ICS507-01 and ICS507-02 are inexpensive ways to generate a low jitte...
Datasheet PDF File ICS507-xx PDF File

ICS507-xx
ICS507-xx


Overview
ICS507-01/02 PECL Clock Synthesizer Description The ICS507-01 and ICS507-02 are inexpensive ways to generate a low jitter 155.
52 MHz (or other high speed) differential PECL clock output from a low frequency crystal input.
Using Phase-LockedLoop (PLL) techniques, the devices use a standard fundamental mode crystal to produce output clocks up to 200 MHz.
Stored in each chip’s ROM is the ability to generate a selection of different multiples of the input reference frequency, including an exact 155.
52 MHz clock from common crystals.
For lowest jitter and phase noise on a 155.
52 MHz clock, a 19.
44 MHz crystal and the x8 selection can be used.
Features • Packaged as 16 pin narrow SOIC or die • Input crystal frequency of 5 - 27 MHz • Input clock frequency of 5 - 52 MHz • Uses low-cost crystal • Differential PECL output clock frequencies up to 200 MHz • Duty cycle of 49/51 • 3.
3 V or 5.
0 V±10% operating supply • Ideal for SONET applications and oscillator manufacturers • Advanced, low power C...



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