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M366S1723ETU-C7A

Samsung semiconductor
Part Number M366S1723ETU-C7A
Manufacturer Samsung semiconductor
Description (M3xxSxxxxETx-C7A) SDRAM Unbuffered Module
Published Nov 18, 2005
Detailed Description 64MB, 128MB, 256MB Unbuffered DIMM SDRAM SDRAM Unbuffered Module 168pin Unbuffered Module based on 128Mb E-die 62/72-b...
Datasheet PDF File M366S1723ETU-C7A PDF File

M366S1723ETU-C7A
M366S1723ETU-C7A


Overview
64MB, 128MB, 256MB Unbuffered DIMM SDRAM SDRAM Unbuffered Module 168pin Unbuffered Module based on 128Mb E-die 62/72-bit Non ECC/ECC Revision 1.
3 February.
2004 Rev.
1.
3 February 2004 64MB, 128MB, 256MB Unbuffered DIMM Revision History Revision 1.
0 (November.
, 2002) - First release Revision 1.
1 (May, 2003) - Merged Spec.
Revision 1.
2 (June, 2003) - Correct Typo.
Revision 1.
3 (February, 2004) - Correct Typo.
SDRAM Rev.
1.
3 February 2004 64MB, 128MB, 256MB Unbuffered DIMM 168Pin Unbuffered DIMM based on 128Mb E-die (x8, x16) Ordering Information Part Number M366S0924ETS-C7A M366S1723ETS-C7A M366S1723ETU-C7A M374S1723ETS-C7A M374S1723ETU-C7A M366S3323ETS-C7A M366S3323ETU-C7A M374S3323ETS-C7A M374S3323ETU-C7A Density 64MB 128MB 128MB 128MB 128MB 256MB 256MB 256MB 256MB Organization 8M x 64 16M x 64 16M x 64 16M x 72 16M x 72 32M x 64 32M x 64 32M x 72 32M x 72 Component Composition 8Mx16(K4S281632E) * 4EA 16Mx8(K4S280832E) * 8EA 16Mx8(K4S280832E) * 8EA 16Mx8(K4S280832E) * 9EA 16Mx8(K4S280832E) * 9EA 16Mx8(K4S280832E)*16EA 16Mx8(K4S280832E)*16EA 16Mx8(K4S280832E)*18EA 16Mx8(K4S280832E)*18EA Component Package 54-TSOPII 54-TSOPII 54-TSOPII 54-TSOPII 54-TSOPII 54-TSOPII 54-TSOPII 54-TSOPII 54-TSOPII SDRAM Height 1,000mil 1,375mil 1,125mil 1,375mil 1,125mil 1,375mil 1,125mil 1,375mil 1,125mil Operating Frequencies - 7A @CL3 Maximum Clock Frequency CL-tRCD-tRP(clock) 133MHz(7.
5ns) 3-3-3 @CL2 100MHz(10ns) 2-2-2 Feature Burst mode operation Auto & self refresh capability (4096 Cycles/64ms) LVTTL compatible inputs and outputs Single 3.
3V ± 0.
3V power supply MRS cycle with address key programs Latency (Access from column address) Burst length (1, 2, 4, 8 & Full page) Data scramble (Sequential & Interleave) • All inputs are sampled at the positive going edge of the system clock • Serial presence detect with EEPROM • • • • • Rev.
1.
3 February 2004 64MB, 128MB, 256MB Unbuffered DIMM PIN CONFIGURATIONS (Front side/back side) Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17...



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