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IN74ACT109

IK Semiconductor
Part Number IN74ACT109
Manufacturer IK Semiconductor
Description Dual J-K Positive-Edge-Triggered Flip-Flop
Published Dec 8, 2005
Detailed Description TECHNICAL DATA IN74ACT109 Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS The IN74ACT109 is identic...
Datasheet PDF File IN74ACT109 PDF File

IN74ACT109
IN74ACT109

Overview
TECHNICAL DATA IN74ACT109 Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS The IN74ACT109 is identical in pinout to the LS/ALS109, HC/HCT109.
The IN74ACT109 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs.
This device consists of two J-K flip-flops with individual set, reset, and clock inputs.
Changes at the inputs are reflected at the outputs with the next low-to-high transition of the clock.
Both Q to Q outputs are available from each flip-flop.
• TTL/NMOS Compatible Input Levels • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 4.
5 to 5.
5 V • Low Input Current: 1.
0 µA; 0.
1 µA @ 25°C • Outputs Source/Sink 24 mA ORDERING INFORMATION IN74ACT109N Plastic IN74ACT109D SOIC TA = -40° to 85° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Inputs Set L H L H H Reset H L L H H H H Clock X X X J X X X L H L H K X X X L L H H Outputs Q H L H * Q L H H* H L Toggle No Change H L ...


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