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IP00C770

I-Chips
Part Number IP00C770
Manufacturer I-Chips
Description Smart De-Interlacer for HDTV
Published Dec 10, 2005
Detailed Description General Description The IP00C770 features a 10-bit motion-adaptive algorithm for de-interlacing HD video signals. It sup...
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IP00C770
IP00C770

Overview
General Description The IP00C770 features a 10-bit motion-adaptive algorithm for de-interlacing HD video signals.
It supports all SD and HD interlaced inputs and supports up to 1080p60 output format.
The IP00C770 embeds an advanced 10-bit adaptive motion filter with a wide kernel.
It also supports 3:2 and 2:2 reverse pull-down as well as film mode detection.
IP00C770 Features Input • • • • YUV4:2:2 20-bit / YUV4:4:4 30-bit, 75 Mpixels/sec.
Supports interlaced video up to 1080i Up to 4000 pixels per line, with 2000 pixels of active video External synchronization CPU Interface • 4-line serial External Memory • SDRAM with 80-bit memory bus interface Output • Progressive-scan output up to 1080p60 • YUV4:2:2 40-bit (2 pixels) / RGB 60-bit (2 pixels) up to 150 Mpixels/sec.
• Up to 4000 pixels per line, with 2000 pixels of active video • Internal synchronization Power Supply Voltage • Two sources: 3.
3V and 2.
5V Package • 352-pin PBGA (1.
27mm pitch) De-Interlacing • • • • w w w .
d e e h s a t a Temporal motion detection circuit Diagonal edge detection and enhancement Detection of 3:2 and 2:2 pull down modes Color corrections .
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