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MC68HC68T1

Motorola
Part Number MC68HC68T1
Manufacturer Motorola
Description Real-Time Clock plus RAM with Serial Interface
Published Jan 14, 2006
Detailed Description MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MC68HC68T1/D MC68HC68T1 Real-Time Clock plus RAM with Se...
Datasheet PDF File MC68HC68T1 PDF File

MC68HC68T1
MC68HC68T1

Overview
MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MC68HC68T1/D MC68HC68T1 Real-Time Clock plus RAM with Serial Interface CMOS The MC68HC68T1 HCMOS Clock/RAM peripheral contains a real–time clock/calendar, a 32 x 8 static RAM, and a synchronous, serial, three–wire interface for communication with a microcontroller or processor.
Operating in a burst mode, successive Clock/RAM locations can be read or written using only a single starting address.
An on–chip oscillator allows acceptance of a selectable crystal frequency or the device can be programmed to accept a 50/60 Hz line input frequency.
The LINE and system voltage (VSYS) pins give the MC68HC68T1 the capability for sensing power–up/power–down conditions, a capability useful for battery–backup systems.
The device has an interrupt output capable of signaling a microcontroller or processor of an alarm, periodic interrupt, or power sense condition.
An alarm can be set for comparison with the seconds, minutes, and hours registers.
This alarm can be used in conjunction with the power supply enable (PSE) output to initiate a system power–up sequence if the VSYS pin is powered to the proper level.
A software power–down sequence can be initiated by setting a bit in the interrupt control register.
This applies a reset to the CPU via the CPUR pin, sets the clock out (CLKOUT) and PSE pins low, and disables the serial interface.
This condition is held until a rising edge is sensed on the VSYS input pin, signaling system power coming on, or by activation of a previously enabled interrupt if the VSYS pin is powered up.
A watchdog circuit can be enabled that requires the microcontroller or processor to toggle the slave select (SS) pin of the MC68HC68T1 periodically without performing a serial transfer.
If this condition is not met, the CPUR line resets the CPU.
• Full Clock Features — Seconds, Minutes, Hours (AM/PM), Day–of–Week, Date, Month, Year (0 – 99), Auto Leap Year • 32–Byte General Purpose RAM • Direct Inter...


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