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DM74LS73A

Fairchild Semiconductor
Part Number DM74LS73A
Manufacturer Fairchild Semiconductor
Description Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops
Published Jan 20, 2006
Detailed Description DM74LS73A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs August 1986 Rev...
Datasheet PDF File DM74LS73A PDF File

DM74LS73A
DM74LS73A

Overview
DM74LS73A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs August 1986 Revised March 2000 DM74LS73A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs General Description This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs.
The J and K data is processed by the flip-flops on the falling edge of the clock pulse.
The clock triggering occurs at a voltage level and is not directly related to the transition time of the negative going edge of the clock pulse.
The data on the J and K inputs is allowed to change while the clock is HIGH or LOW without affecting the outputs as long as setup and hold times are not violated.
A low logic level on the clear input will reset the outputs regardless of the levels of the other inputs.
Ordering Code: Order Number DM74LS73AM DM74LS73AN Package Number M14A N14A Package Description 14-Lead Small Outline Integrated Circ...


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