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AS4C4M4E1

Part Number	AS4C4M4E1
Manufacturer	Alliance Semiconductor
Description	4M x 4 CMOS DRAM
Published	Mar 5, 2006
Detailed Description	May 2001 ® AS4C4M4E1 4M×4 CMOS DRAM (EDO) family Features • Organization: 4,194,304 words × 4 bits • High speed - 50/6...
Datasheet	AS4C4M4E1 PDF File

Overview

May 2001 ® AS4C4M4E1 4M×4 CMOS DRAM (EDO) family Features • Organization: 4,194,304 words × 4 bits • High speed - 50/60 ns RAS access time - 25/30 ns column address access time - 12/15 ns CAS access time • TTL-compatible, three-state I/O • JEDEC standard package - 300 mil, 24/26-pin SOJ - 300 mil, 24/26-pin TSOP • Low power consumption - Active: 908 mW max - Standby: 5.
5 mW max, CMOS I/O • Extended data out • Refresh - 2048 refresh cycles, 32 ms refresh interval for AS4C4M4E1 - RAS-only or CAS-before-RAS refresh • 5V power supply • Latch-up current ≥ 200 mA • ESD protection ≥ 2000 volts • Industrial and commercial temperature available Pin arrangement SOJ VCC I/O0 I/O1 WE RAS NC A10 A0 A1 A2 A3 VCC 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 GND I/O3 I/O2 CAS OE A9 A8 A7 A6 A5 A4 GND VCC I/O0 I/O1 WE RAS NC A10 A0 A1 A2 A3 VCC 1 2 3 4 5 6 7 8 9 10 11 12 TSOP 24 23 22 21 20 19 Selection guide Maximum RAS access time Maximum column address access time Maximum...

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