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KS32C50100

Samsung
Part Number KS32C50100
Manufacturer Samsung
Description 32-Bit Timers
Published Mar 10, 2006
Detailed Description KS32C50100 RISC MICROCONTROLLER 32-BIT TIMERS 11 OVERVIEW 32-BIT TIMERS The KS32C50100 has two 32-bit timers. These ...
Datasheet PDF File KS32C50100 PDF File

KS32C50100
KS32C50100


Overview
KS32C50100 RISC MICROCONTROLLER 32-BIT TIMERS 11 OVERVIEW 32-BIT TIMERS The KS32C50100 has two 32-bit timers.
These timers can operate in interval mode or in toggle mode.
The output signals are TOUT0 and TOUT1, respectively.
You enable or disable the timers by setting control bits in the timer control register, TCON.
An interrupt request is generated whenever a timer count-out (down count) occurs.
INTERVAL MODE OPERATION In interval mode, a timer generates a one-shot pulse of a preset timer clock duration whenever a time-out occurs.
This pulse generates a time-out interrupt that is directly output at the timer's configured output pin (TOUTn).
In this case, the timer frequency monitored at the TOUTn pin is calculated as: fTOUT = fMCLK / Timer data value TOGGLE MODE OPERATION In toggle mode, the timer pulse continues to toggle whenever a time-out occurs.
An interrupt request is generated whenever the level of the timer output signal is inverted (that is, when the level toggles).
The toggle pulse is output directly at the configured output pin.
Using toggle mode, you can achieve a flexible timer clock range with 50% duty.
In toggle mode, the timer frequency monitored at the TOUTn pin is calculated as follows: fTOUT = fMCLK / (2 * Timer data value) m o .
c U 4 t e e h S a t a .
D w w w f TOUT INTERVAL MODE Time-out Time-out Time-out f TOUT TOGGLE MODE (INITIAL TOUTn IS 0) Figure 11-1 Timer Output Siganl Timing m o .
c U 4 t e e h S a at .
D w w w 11-1 32-BIT TIMERS KS32C50100 RISC MICROCONTROLLER TIMER OPERATION GUIDELINES The block diagram in Figure 11-2 shows how the 32-bit timers are configured in the KS32C50100.
The following guidelines apply to timer functions.
• • • • When a timer is enabled, it loads a data value to its count register and begins decrementing the count register value.
When the timer interval expires, the associated interrupt is generated.
The base value is then reloaded and the timer continues decrementing its count register value.
If a ti...



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