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MPC2004

Motorola
Part Number MPC2004
Manufacturer Motorola
Description (MPC2004 / MPC2005) 256KB and 512KB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms
Published Mar 11, 2006
Detailed Description MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MPC2004/D Advance Information 256KB and 512KB BurstRAM™...
Datasheet PDF File MPC2004 PDF File

MPC2004
MPC2004

Overview
MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MPC2004/D Advance Information 256KB and 512KB BurstRAM™ Secondary Cache Modules for PowerPC™ PReP/CHRP Platforms The MPC2004 and MPC2005 are designed to provide burstable, high performance 256KB/512KB L2 cache for the PowerPC 60x microprocessor family in conformance with the PowerPC Reference Platform (PReP) and the PowerPC Common Hardware Reference Platform (CHRP) specifications.
The modules are configured as 32K x 72 and 64K x 72 bits in a 182 (91 x 2) pin DIMM format.
Each module uses four of Motorola’s 5 V 32K x 18 or 64K x 18 BurstRAMs and a 5 V cache tag RAM configured as 16K x 12 for tag field plus 16K x 2 for valid and dirty status bits.
Bursts can be initiated with the SRAMADS signal.
Subsequent burst addresses are generated internal to the BurstRAM by the SRAMCNTEN signal.
Write cycles are internally self timed and are initiated by the rising edge of the clock (CLKx) inputs.
Eight write enables are provided for ...


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