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MB90V340A

Fujitsu Media Devices
Part Number MB90V340A
Manufacturer Fujitsu Media Devices
Description (MB90F350 Series) 16-bit Proprietary Microcontroller
Published Jun 21, 2006
Detailed Description www.DataSheet4U.com FUJITSU SEMICONDUCTOR DATA SHEET DS07-13737-2E 16-bit Proprietary Microcontroller CMOS F2MC-16LX...
Datasheet PDF File MB90V340A PDF File

MB90V340A
MB90V340A


Overview
www.
DataSheet4U.
com FUJITSU SEMICONDUCTOR DATA SHEET DS07-13737-2E 16-bit Proprietary Microcontroller CMOS F2MC-16LX MB90350 Series MB90F352/S, MB90352/S s DESCRIPTION The MB90350-series with 1 channel FULL-CAN* interface and FLASH ROM is especially designed for automotive and industrial applications.
Its main feature is the on-board CAN Interface, which conform to V2.
0 Part A and Part B, while supporting a very flexible message buffer scheme and so offering more functions than a normal full CAN approach.
With the new 0.
35 µm CMOS technology, Fujitsu now offers on-chip FLASH-ROM program memory up to 128 Kbytes.
An internal voltage booster removes the necessity for a second programming voltage.
An on board voltage regulator provides 3 V to the internal MCU core.
This creates a major advantage in terms of EMI and power consumption.
The internal PLL clock frequency multiplier provides an internal 42 ns instruction cycle time from an external 4 MHz clock.
The unit features a 4 channel Output Compare Unit and 6 channel Input Capture Unit with 2 separate 16-bit free running timers.
2 channels UART constitute additional functionality for communication purposes.
* : Controller Area Network (CAN) - License of Robert Bosch GmbH Note : F2MC stands for FUJITSU Flexible Microcontroller, a registered trademark of FUJITSU LIMITED.
s PACKAGE m 64-pin Plastic LQFP Sh eet 4U .
co ww w.
D ata (FPT-64P-M09) www.
DataSheet4U.
com MB90350 Series s FEATURES • Clock • Built-in PLL clock frequency multiplication circuit • Selection of machine clocks (PLL clocks) is allowed among frequency division by two on oscillation clock, and multiplication of 1 to 6 times of oscillation clock (for 4 MHz oscillation clock, 4 MHz to 24 MHz).
• Operation by sub-clock (up to 50 kHz : 100 kHz oscillation clock divided by two) is allowed.
(devices without S-suffix only) • Minimum execution time of instruction : 42 ns (when operating with 4-MHz oscillation clock, and 6-time multiplied PLL clock).
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