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SA-1110

Intel Corporation
Part Number SA-1110
Manufacturer Intel Corporation
Description Intel-R StrongARM SA-1110 Microprocessor
Published Sep 24, 2006
Detailed Description www.DataSheet4U.com Intel® StrongARM* SA-1110 Microprocessor Brief Datasheet Product Features The Intel®StrongARM SA-1...
Datasheet PDF File SA-1110 PDF File

SA-1110
SA-1110

Overview
www.
DataSheet4U.
com Intel® StrongARM* SA-1110 Microprocessor Brief Datasheet Product Features The Intel®StrongARM SA-1110 Microprocessor (SA-1110) is a device optimized for meeting portable and embedded application requirements.
The SA-1110 incorporates a 32-bit StrongARM RISC processor capable of running at up to 206 MHz.
The SA-1110 has a large instruction and data cache, memory-management unit (MMU), and read/write buffers.
The SA-1110 memory bus interfaces to many device types including synchronous DRAM (SDRAM), synchronous mask ROM (SMROM), and SRAM-like variable latency I/O devices with a shared data ready signal.
In addition, the SA-1110 provides system support logic, multiple serial communication channels, a color/gray scale LCD controller, PCMCIA support for up to two sockets, and general-purpose I/O ports.
s High performance — 150 Dhrystone 2.
1 MIPS @ 133 MHz — 235 Dhrystone 2.
1 MIPS @ 206 MHz s Memory bus — Interfaces to ROM, synchronous mask ROM (SMROM), Flash, SRAM, SRAM-like variable latency I/O, DRAM, and synchronous DRAM (SDRAM) — Supports two PCMCIA sockets s Low power (normal mode) † s 32-way set-associative caches DataShe e — <240 mW @1.
55 V/133 MHz — 16 Kbyte instruction cache DataSheet4U.
com — <400 mW @1.
75 V/206 MHz — 8 Kbyte write-back data cache s Integrated clock generation — Internal phase-locked loop (PLL) — 3.
686-MHz oscillator — 32.
768-kHz oscillator s 32-entry MMUs — Maps 4 Kbyte, 8 Kbyte, or 1 Mbyte s Power-management features — Normal (full-on) mode — Idle (power-down) mode — Sleep (power-down) mode s Write buffer — 8-entry, between 1 and 16 bytes each s Big and little endian operating modes 3.
3-V I/O interface † s Read buffer — 4-entry, 1, 4, or 8 words 256 mini-ball grid array (mBGA) s s Power dissipation, particularly in idle mode, is strongly dependent on the details of the system design Order Number: 278241-005 April 2000 DataSheet4U.
com DataSheet 4 U .
com www.
DataSheet4U.
com et4U.
com DataShe e ...


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