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T7121

Agere Systems
Part Number T7121
Manufacturer Agere Systems
Description T7121 HDLC Interface
Published Oct 8, 2006
Detailed Description www.DataSheet4U.com Data Sheet April 1997 T7121 HDLC Interface for ISDN (HIFI-64) Features s Description Low-cost de...
Datasheet PDF File T7121 PDF File

T7121
T7121

Overview
www.
DataSheet4U.
com Data Sheet April 1997 T7121 HDLC Interface for ISDN (HIFI-64) Features s Description Low-cost device for B-channel (64 kbits/s) or D-channel (16 kbits/s) data transport.
s s s s s s s s The T7121 HDLC Interface for ISDN (HIFI-64) connects serial communications links carrying HDLC bitsynchronous data frames to 8-bit microcomputer sysOptional transparent mode—no HDLC framing is tems.
There is an optional transparent mode of operperformed.
ation in which no HDLC processing is performed on Frame sync (FS) allows a slot-select feature to user data.
The device communicates with the system microprocessor as a memory-mapped peripheral and access an individual time slot in any TDM data is controlled by reading and writing 19 internal regisstream (e.
g.
, Lucent Technologies Microelectronics ters.
The chip can be instructed to interrupt the Group Concentration Highway Interface [CHI] or microprocessor when it detects certain events requirsubset).
ing microprocessor attention.
The HDLC transmitter Bit-masking option allows effective data rates of 8, and receiver are each buffered with 64-byte, first-in16, 24, 32, 40, 48, and 56 kbits/s.
first-out (FIFO) memory storage.
The 64-byte buffer DataShee Maximum data rate up to 4.
096 MHz.
depth reduces the number of status polls or interDataSheet4U.
com rupts to be processed by the microprocessor, improvSerial data-transfer pins for direct connection to the ing overall system efficiency.
The major blocks are Lucent ISDN line transceiver T7250C.
the microprocessor interface, transmit and receive Supports IOM2, K2, GCI, and SLD interface.
FIFO memory buffers, HDLC processor, and a concentration highway interface (see Figure 1).
The Parallel microprocessor interface with either multiT7121 device is available in a 28-pin, plastic DIP or a plexed or demultiplexed address and data lines for 28-pin, plastic, small-outline, J-lead (SOJ) package easy interface with any microprocessor.
for surface mounting.
Single inter...


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