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HY64UD16162B

Hynix Semiconductor
Part Number HY64UD16162B
Manufacturer Hynix Semiconductor
Description 1M x 16 bit Low Low Power 1T/1C Pseudo SRAM
Published Dec 13, 2006
Detailed Description www.DataSheet4U.com HY64UD16162B Series Document Title 1M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history R...
Datasheet PDF File HY64UD16162B PDF File

HY64UD16162B
HY64UD16162B

Overview
www.
DataSheet4U.
com HY64UD16162B Series Document Title 1M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history Revision No.
History 1.
0 Initial Draft Date Dec.
3.
’02 Remark Preliminary This document is a general product description and is subject to change without notice.
Hynix Semiconductor Inc.
does not assume any responsibility for use of circuits described.
No patent licenses are implied.
Revision 1.
0 / December.
2002 1 HY64UD16162B Series 1M x 16 bit Low Low Power 1T/1C SRAM DESCRIPTION The HY64UD16162B is a 16Mbit 1T/1C SRAM featured by high-speed operation and super low power consumption.
The HY64UD16162B adopts one transistor memory cell and is organized as 1,048,576 words by 16bits.
The HY64UD16162B operates in the extended range of temperature and supports a wide operating voltage range.
The HY64UD16162B also supports the deep power down mode for a super low standby current.
The HY64UD16162B delivers the high-density low power SRAM capability to the high-speed low power system.
FEATURES • CMOS Process Technology • 1M x 16 bit Organization • TTL compatible and Tri-state outputs • Deep Power Down : Memory cell data hold invalid • Standard pin configuration : 48-FBGA(6mmX8mm) • Data mask function by /LB, /UB • Separated I/O Power Supply : Vddq PRODUCT FAMILY Product No.
HY64UD16162B-DF60E HY64UD16162B-DF60I HY64UD16162B-DF70E HY64UD16162B-DF70I Voltage [V] Vdd/Vddq 3.
0/3.
0 3.
0/3.
0 3.
0/3.
0 3.
0/3.
0 Mode 1CS with /UB,/LB:tCS1 1CS with /UB,/LB:tCS1 1CS with /UB,/LB:tCS1 1CS with /UB,/LB:tCS1 Power Dissipation (ISB1,Max) (IDPD,Max) (ICC2,Max) TBD 2µA 25mA TBD 2µA 25mA 85µA 2µA 25mA 85µA 2µA 25mA Speed tRC[ns] TBD TBD 70 70 Temp.
[°C] -25~85 -40~85 -25~85 -40~85 Note 1.
tCS - /UB,/LB=High : Chip Deselect.
PIN CONNECTION (Top View) /LB IO9 /OE /UB A0 A3 A5 A17 A1 A4 A6 A7 A16 A15 A13 A10 A2 /CS1 IO2 IO4 IO5 IO6 /WE A11 CS2 IO1 IO3 Vdd Vss IO7 IO8 NC /CS1 CS2 /WE /OE /LB /UB A19 A0 BLOCK DIAGRAM ROW DECODER IO1 SENSE AMP COLUMN DECODER PRE...


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