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CY2DP3110

Cypress Semiconductor
Part Number CY2DP3110
Manufacturer Cypress Semiconductor
Description Differential Clock/Data Fanout Buffer
Published Dec 20, 2006
Detailed Description www.DataSheet4U.com FastEdge™ Series CY2DP3110 1 of 2:10 Differential Clock/Data Fanout Buffer Features • Ten ECL/PECL...
Datasheet PDF File CY2DP3110 PDF File

CY2DP3110
CY2DP3110

Overview
www.
DataSheet4U.
com FastEdge™ Series CY2DP3110 1 of 2:10 Differential Clock/Data Fanout Buffer Features • Ten ECL/PECL differential outputs • One ECL/PECL differential or single-ended inputs (CLKA) • One HSTL differential or single-ended inputs (CLKB) • Hot-swappable/-insertable • 50 ps output-to-output skew • 150 ps device-to-device skew • 400 ps propagation delay (typical) • 1.
2 ps RMS period jitter (max.
) • 1.
5 GHz Operation (2.
7 GHz maximum toggle frequency) • PECL and HSTL mode supply range: VCC = 2.
5V± 5% to 3.
3V±5% with VEE = 0V • ECL mode supply range: VE E = –2.
5V± 5% to –3.
3V±5% with VCC = 0V • Industrial temperature range: –40°C to 85°C • 32-pin TQFP package • Temperature compen...


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