DatasheetsPDF.com

CDCR83A

TelCom Semiconductor
Part Number CDCR83A
Manufacturer TelCom Semiconductor
Description DIRECT RAMBUS CLOCK GENERATOR
Published Dec 23, 2006
Detailed Description www.DataSheet4U.com CDCR83A www.ti.com SCAS811 – AUGUST 2005 DIRECT RAMBUS™ CLOCK GENERATOR FEATURES • 400-MHz Differe...
Datasheet PDF File CDCR83A PDF File

CDCR83A
CDCR83A

Overview
www.
DataSheet4U.
com CDCR83A www.
ti.
com SCAS811 – AUGUST 2005 DIRECT RAMBUS™ CLOCK GENERATOR FEATURES • 400-MHz Differential Clock Source for Direct Rambus™ Memory Systems for an 800-MHz Data Transfer Rate Fail-Safe Power Up Initialization Synchronizes the Clock Domains of the Rambus Channel With an External System or Processor Clock Three Power Operating Modes to Minimize Power for Mobile and Other Power-Sensitive Applications Operates From a Single 3.
3-V Supply and 120 mW at 300 MHz (Typ) Packaged in a Shrink Small-Outline Package (DBQ) Supports Frequency Multipliers: 4, 6, 8, 16/3 No External Components Required for PLL Supports Independent Channel Clocking Spread Spectrum Clocking Tracking Capability to Reduce EMI Designed for Use With TI's 133-MHz Clock Synthesizers CDC924 and CDC921 Cycle-Cycle Jitter Is Less Than 50 ps at 400 MHz Certified by Gigatest Labs to Exceed the Rambus DRCG Validation Requirement Supports Industrial Temperature Range of –40°C to 85°C VDDIR REFCLK VDDP GNDP GNDI PCLKM SYNCLKN GNDC VDDC VDDIPD STOPB PWRDNB DBQ PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 • • • • • • • • • • • • • S0 S1 VDDO GNDO CLK NC CLKB GNDO VDDO MULT0 MULT1 S2 NC − No internal connection DESCRIPTION The Direct Rambus clock generator (DRCG) provides the necessary clock signals to support a Direct Rambus memory subsystem.
It includes signals to synchronize the Direct Rambus channel clock to an external system or processor clock.
It is designed to support Direct Rambus memory on a desktop, workstation, server, and mobile PC motherboards.
DRCG also provides an off-the-shelf solution for a broad range of Direct Rambus memory applications.
The DRCG provides clock multiplication and phase alignment for a Direct Rambus memory subsystem to enable synchronous communication between the Rambus channel and ASIC clock domains.
In a Direct Rambus memory subsystem, a system clock source provides the REFCLK and PCLK clock references to th...


Similar Datasheet


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)