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NB100LVEP222

ON Semiconductor
Part Number NB100LVEP222
Manufacturer ON Semiconductor
Description 1:15 Differential ECL/PECL /1 /2 Clock Driver
Published Apr 23, 2007
Detailed Description NB100LVEP222 2.5 V/3.3 V 1:15 Differential ECL/PECL ÷1/÷2 Clock Driver The NB100LVEP222 is a low skew 1:15 differential ...
Datasheet PDF File NB100LVEP222 PDF File

NB100LVEP222
NB100LVEP222

Overview
NB100LVEP222 2.
5 V/3.
3 V 1:15 Differential ECL/PECL ÷1/÷2 Clock Driver The NB100LVEP222 is a low skew 1:15 differential ÷1/÷2 ECL fanout buffer designed with clock distribution in mind.
The LVECL/LVPECL input signal pairs can be used in a differential configuration or single−ended (with VBB output reference bypassed and connected to the unused input of a pair).
Either of two fully differential clock inputs may be selected.
Each of the four output banks of 2, 3, 4, and 6 differential pairs may be independently configured to fanout 1X or 1/2X of the input frequency.
When the output banks are configured with the B1 mode, data can also be distributed.
The LVEP222 specifically guarantees low output to output skew.
Optimal design, layout, and processing minimize skew within a device and from lot to lot.
This device is an improved version of the MC100LVE222 with higher speed capability and reduced skew.
The fsel pins and CLK_Sel pin are asynchronous control inputs.
Any changes may cause indeterminate output states requiring an MR pulse to resynchronize any 1/2X outputs (See Figure 3).
Unused output pairs should be left unterminated (open) to reduce power and switching noise.
The NB100LVEP222, as with most ECL devices, can be operated from a positive VCC/VCC0 supply in LVPECL mode.
This allows the LVEP222 to be used for high performance clock distribution in +2.
5/3.
3 V systems.
In a PECL environment series or Thevenin line, terminations are typically used as they require no additional power www.
DataSheet4U.
com supplies.
For more information on using PECL, designers should refer to Application Note AN1406/D.
For a SPICE model, refer to Application Note AN1560/D.
The VBB pin, an internally generated voltage supply, is available to this device only.
For single−ended LVPECL input conditions, the unused differential input is connected to VBB as a switching reference voltage.
VBB may also rebias AC coupled inputs.
When used, decouple VBB and VCC/VCC0 via a 0.
01 mF capacitor and l...


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