DatasheetsPDF.com

XRD9816B

Exar
Part Number XRD9816B
Manufacturer Exar
Description (XRD9814B / XRD9816B) 3-Channel 14/16-Bit Linear CCD/CIS Sensor Signal Processors
Published Aug 25, 2007
Detailed Description www.DataSheet4U.com XRD9814B/XRD9816B 3-Channel 14/16-Bit Linear CCD/CIS Sensor Signal Processors November 2002-2 FEAT...
Datasheet PDF File XRD9816B PDF File

XRD9816B
XRD9816B

Overview
www.
DataSheet4U.
com XRD9814B/XRD9816B 3-Channel 14/16-Bit Linear CCD/CIS Sensor Signal Processors November 2002-2 FEATURES • 14-Bit (XRD9814B) or 16-Bit (XRD9816B) A/D Converter • Triple-Channel, 2.
5 MSPS Color Scan Mode • Single-Channel, 6 MSPS Monochrome Scan Mode • Triple Correlated Double Sampler • Triple 10-Bit Programmable Gain Amplifier • Triple 10-Bit Offset Compensation DAC • Fully Differential or Single-Ended Inputs • CDS or S/H Mode • Inverting or Non-Inverting Mode • Internal Voltage Reference • Serial Control: On Data Bus or Separate Pins • Improved PGA Performance GENERAL DESCRIPTION The XRD9814B/9816B is a fully integrated, high-performance analog signal processor/digitizer specifically designed for use in 3-channel linear Charge Coupled Device (CCD) and Contact Image Sensitive (CIS) imaging applications.
Each channel of the XRD9814B/9816B includes a Correlated Double Sampler (CDS), Programmable Gain Amplifier (PGA) and channel offset adjustment.
After gain and offset adjustment, the analog inputs are sequentially sampled and digitized by an accurate 14/ 16-bit A/D converter.
The analog front-end can be configured for inverting/non-inverting input, CDS or sample-hold (S/H) mode, or AC/DC coupling, making the XRD9814B/9816B suitable for use in CCD, CIS and other data acquisition applications.
The CDS mode of operation supports both line and pixel-clamp modes and can be used to achieve significant reduction in system 1/f noise and CCD reset clock feed-through.
In S/H mode the internal DCrestore voltage clamp can be enabled or disabled to support AC-coupled or DC inputs.
Sampling mode, 10-bit PGA gain (1024 linear steps), 8-bit fine offset adjustment (256 linear steps), 2-bit gross offset adjustment and input signal polarity are all programmable through a serial interface.
PGA gain range is 1 to 10, and channel offset range is -300mV to 300mV for fine adjustment and additional -400mV to +200mV for gross offset adjustment.
The A/D Full-Scale Range (FSR)...


Similar Datasheet


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)