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AZ100LVEL16VV

Arizona Microtek
Part Number AZ100LVEL16VV
Manufacturer Arizona Microtek
Description Dual Frequency ECL/PECL Oscillator Gain Stage & Buffer
Published Sep 14, 2007
Detailed Description www.DataSheet4U.com ARIZONA MICROTEK, INC. AZ100LVEL16VV Dual Frequency ECL/PECL Oscillator Gain Stage & Buffer with E...
Datasheet PDF File AZ100LVEL16VV PDF File

AZ100LVEL16VV
AZ100LVEL16VV


Overview
www.
DataSheet4U.
com ARIZONA MICROTEK, INC.
AZ100LVEL16VV Dual Frequency ECL/PECL Oscillator Gain Stage & Buffer with Enable FEATURES • • • • • • High Bandwidth for ≥1GHz Similar Operation as AZ100EL16VR except with selectable data input pairs Operating Range of 3.
0V to 5.
5V Minimizes External Components Available in a 3x3mm MLP Package S–Parameter (.
s2p) and IBIS Model Files Available on Arizona Microtek Website PACKAGE MLP 16 (3x3) RoHS Compliant / Lead (Pb) Free DIE 1 2 3 PACKAGE AVAILABILITY PART NUMBER AZ100LVEL16VVL+ AZ100LVEL16VVXP MARKING AZM+ 16K N/A NOTES 1,2 3 Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.
5K parts) Tape & Reel.
Date code format: “Y” for year followed by “WW” for week.
Waffle Pack DESCRIPTION The AZ100LVEL16VV is a specialized oscillator gain stage with two selectable data input pairs and a high gain output buffer including an enable.
The QHG/Q ¯ HG outputs have a voltage gain several times greater than the Q/Q ¯ outputs.
The AZ100LVEL16VV provides two selectable data input pairs that permit switching between two different oscillator frequencies.
When the select pin (SEL) is LOW or open (NC) data from the D0/D0 ¯¯ is selected.
When the SEL pin is HIGH data from the D1/D1 ¯¯ is selected.
Allowing continuous oscillator operation, the (EN) enable works with either data input pair.
When EN is HIGH or open (NC), input data is passed to both sets of outputs.
When EN is LOW, the QHG/Q ¯ HG outputs will be forced LOW/HIGH respectively, while input data will continue to be passed to the Q/Q ¯ outputs.
The EN and SEL inputs can be driven with an ECL/PECL signal or a full supply swing CMOS type logic signal.
The AZ100LVEL16VV also provides a VBB with a 1.
5mA sink/source current.
Each data input is separately connected to VBB with a 470Ω internal bias resistor.
Bypassing VBB to ground with a 0.
01 μF capacitor is recommended.
Each Q/Q ¯ output has a 4 mA on-chip pull-down current source.
External resistors may ...


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