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AZ12010

Arizona Microtek
Part Number AZ12010
Manufacturer Arizona Microtek
Description Phase-Locked Loop Clock Generator
Published Sep 17, 2007
Detailed Description www.DataSheet4U.com ARIZONA MICROTEK, INC. AZ12010 Multiply by 16, 32 Phase-Locked Loop Clock Generator FEATURES • • •...
Datasheet PDF File AZ12010 PDF File

AZ12010
AZ12010

Overview
www.
DataSheet4U.
com ARIZONA MICROTEK, INC.
AZ12010 Multiply by 16, 32 Phase-Locked Loop Clock Generator FEATURES • • • • • • Differential Inputs/Outputs for External Voltage Controlled SAW Oscillator Optional Internal Crystal Oscillator Driver Internal Edge-Matching Phase/Frequency Detector Internal Charge-Pump/Integrator Amplifier RF Bipolar Design for Low Phase Noise Available in a 3x3 mm MLP Package PACKAGE MLP 16 (3x3) MLP 16 (3x3) RoHS Compliant / Lead (Pb) Free MLP 16 (3x3) MLP 16 (3x3) RoHS Compliant / Lead (Pb) Free DIE 1 2 3 PACKAGE AVAILABILITY PART NO.
AZ12010AL AZ12010AL+ AZ12010BL AZ12010BL+ AZ12010XP MARKING AZ12010A AZ12010A+ AZ12010B AZ12010B+ N/A NOTES 1,2 1,2 1,2 1,2 3 DESCRIPTION Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.
5K parts) Tape & Reel.
Date code format: “YY” for year followed by “WW” for week.
Waffle Pack The AZ12010 contains all of the functional elements necessary to implement a Phase-Locked Loop for clock multiplication at frequencies up to 800 MHz.
A fixed 32 times multiplication allows the use of low cost crystals or a low frequency reference signal.
The output can be divided by two for 16 times net multiplication.
The VCSO is differentially or single-ended driven using the chip CML SAW outputs.
The dynamic properties of the PLL are under the control of the user through selection of the desired external components.
1630 S.
STAPLEY DR.
, SUITE 127 • MESA, ARIZONA 85204 • USA • (480) 962-5881 • FAX (480) 890-2541 www.
azmicrotek.
com AZ12010 3X3 MLP 16 PACKAGE AZM12010A: CPPOL pulled High AZM12010B: CPPOL pulled Low November 2006 * REV - 5 www.
azmicrotek.
com 2 AZ12010 DIE MAP Pad Center Locations Signal Name SAWIN ¯¯¯¯¯¯¯ SAWIN TEST ENABLE VEE REFIN ¯¯¯¯¯¯¯¯ REFOUT CPOUT CPREF INTREF INTSUM VEE INTOUT CPPOL VBB VEEP Q ¯ Q VCC VCC SAWOUT ¯¯¯¯¯¯¯¯ SAWOUT DIV_SEL VEE November 2006 * REV - 5 X coordinate (μ) -522.
0 -522.
0 -522.
0 -522.
0 -522.
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0 -365.
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