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ICS844003I-01

ICS
Part Number ICS844003I-01
Manufacturer ICS
Description CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER
Published Oct 2, 2007
Detailed Description www.DataSheet4U.com PRELIMINARY Integrated Circuit Systems, Inc. ICS844003I-01 FEMTOCLOCKS™CRYSTAL-TO-LVDS FREQUENCY...
Datasheet PDF File ICS844003I-01 PDF File

ICS844003I-01
ICS844003I-01


Overview
www.
DataSheet4U.
com PRELIMINARY Integrated Circuit Systems, Inc.
ICS844003I-01 FEMTOCLOCKS™CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER FEATURES • Three LVDS outputs on two banks, A Bank with one LVDS pair and B Bank with 2 LVDS output pairs • Using a 19.
53125MHz or 25MHz crystal, the two output banks can be independently set for 625MHz, 312.
5MHz, 156.
25MHz or 125MHz • Selectable crystal oscillator interface or LVCMOS/LVTTL single-ended input • VCO range: 490MHz to 680MHz • RMS phase jitter @ 156.
25MHz (1.
875MHz - 20MHz): 0.
56ps (typical) • 3.
3V output supply mode • -40°C to 85°C ambient operating temperature GENERAL DESCRIPTION The ICS844003I-01 is a 3 differential output LVDS Synthesizer designed to generate Ethernet referHiPerClockS™ ence clock frequencies and is a member of the HiPerClocks™ family of high performance clock solutions from ICS.
Using a 19.
53125MHz or 25MHz, 18pF parallel resonant crystal, the following frequencies can be generated based on the settings of 4 frequency select pins (DIV_SEL[A1:A0], DIV_SEL[B1:B0]): 625MHz, 312.
5MHz, 156.
25MHz, and 125MHz.
The 844003I-01 has 2 output banks, Bank A with 1 differential LVDS output pair and Bank B with 2 differential LVDS output pairs.
ICS The two banks have their own dedicated frequency select pins and can be independently set for the frequencies mentioned above.
The ICS844003I-01 uses ICS’ 3rd generation low phase noise VCO technology and can achieve 1ps or lower typical rms phase jitter, easily meeting Ethernet jitter requirements.
The ICS844003I-01 is packaged in a small 24-pin TSSOP package.
PIN ASSIGNMENT DIV_SELB0 VCO_SEL MR VDDO_A QA0 nQA0 CLK_ENB CLK_ENA FB_DIV VDDA VDD DIV_SELA0 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 DIV_SELB1 VDDO_B QB0 nQB0 QB1 nQB1 XTAL_SEL TEST_CLK XTAL_IN XTAL_OUT GND DIV_SELA1 BLOCK DIAGRAM CLK_ENA Pullup DIV_SELA[1:0] Pullup VCO_SEL Pullup ICS844003I-01 24-Lead TSSOP 4.
40mm x 7.
8mm x 0.
92mm package body G Package Top View QA0 00 ÷1 ÷2 ÷3 ÷4 (de...



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