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S2043

Part Number	S2043
Manufacturer	AMCC
Description	(S2042 / S2043) HIGH PERFORMANCE SERIAL INTERFACE CIRCUITS
Published	Oct 3, 2007
Detailed Description	www.DataSheet4U.com PRELIMINARY DEVICE SPECIFICATION ® HIGH PERFORMANCE SERIAL INTERFACE CIRCUITS BiCMOS PECL CLOCK SE...
Datasheet	S2043 PDF File

Overview

www.
DataSheet4U.
com PRELIMINARY DEVICE SPECIFICATION ® HIGH PERFORMANCE SERIAL INTERFACE CIRCUITS BiCMOS PECL CLOCK SERIAL GENERATOR HIGH PERFORMANCE INTERFACE CIRCUITS GENERAL DESCRIPTION S2042/S2043 S2042/S2043 FEATURES • Functionally compliant with ANSI X3T11 Fibre Channel physical and transmission protocol standards • S2042 transmitter incorporates phase-locked loop (PLL) providing clock synthesis from low-speed reference • S2043 receiver PLL configured for clock and data recovery • 1062, 531 and 266 Mb/s operation • 10- or 20-bit parallel TTL compatible interface • 1 watt typical power dissipation for chipset • +3.
3/+5V power supply • Low-jitter serial PECL compatible interface • Lock detect • Local loopback • 10mm x 10mm 52 PQFP package • Fibre Channel framing performed by receiver • Continuous downstream clocking from receiver • TTL compatible outputs possible with +5V I/O power supply The S2042 and S2043 transmitter and receiver pair are designed to perform high-speed seri...

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