DatasheetsPDF.com

ICS952003

ICS
Part Number ICS952003
Manufacturer ICS
Description Programmable Timing Control Hub
Published Oct 9, 2007
Detailed Description www.DataSheet4U.com Integrated Circuit Systems, Inc. ICS952003 Preliminary Product Review Programmable Timing Control ...
Datasheet PDF File ICS952003 PDF File

ICS952003
ICS952003

Overview
www.
DataSheet4U.
com Integrated Circuit Systems, Inc.
ICS952003 Preliminary Product Review Programmable Timing Control Hub™ for P4™ processor Recommended Application: SIS 645/650 style chipsets.
Output Features: • 2 - Pairs of differential CPUCLKs (differential current mode) • 1 - SDRAM @ 3.
3V • 8 - PCI @3.
3V • 2 - AGP @ 3.
3V • 2 - ZCLKs @ 3.
3V • 1- 48MHz, @3.
3V fixed.
• 1- 24/48MHz, @3.
3V selectable by I2C (Default is 24MHz) • 3- REF @3.
3V, 14.
318MHz.
Features/Benefits: • Selectable asynchronous/synchronous SDRAM, AGP, ZCLK and PCI outputs • Programmable output frequency, divider ratios, output rise/ falltime, output skew.
• Programmable spread percentage for EMI control.
• Watchdog timer technology to reset system if system malfunctions.
• Programmable watch dog safe frequency.
• Support I2C Index read/write and block read/write operations.
• For PC133 SDRAM system use the ICS9179-16 as the memory buffer.
• For DDR SDRAM system use the ICS93705 or ICS93722 as the memory buffer.
• Uses external 14.
318MHz crystal.
Key Specifications: • PCI - PCI output skew: < 500ps • CPU - SDRAM output skew: < 1ns • AGP - AGP output skew: <150ps Pin Configuration VDDREF **FS0/REF0 **FS1/REF1 **FS2/REF2 GNDREF X1 X2 GNDZ ZCLK0 ZCLK1 VDDZ *PCI_STOP# VDDPCI **FS3/PCICLK_F0 **FS4/PCICLK_F1 PCICLK0 PCICLK1 GNDPCI VDDPCI PCICLK2 PCICLK3 PCICLK4 PCICLK5 GNDPCI 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 VDDSD SDRAM GNDSD CPU_STOP#* CPUCLKT_1 CPUCLKC_1 VDDCPU GNDCPU CPUCLKT_0 CPUCLKC_0 IREF GNDA VDDA SCLK SDATA PD#*/Vtt_PWRGD GNDAGP AGPCLK0 AGPCLK1 VDDAGP VDDA48 48MHz 24_48MHz/MULTISEL* GND48 48-Pin 300-mil SSOP * These inputs have a 120K pull up to VDD.
** These inputs have a 120K pull down to GND.
Block Diagram PLL2 /2 X1 X2 XTAL OSC PLL1 Spread Spectrum 48MHz 24_48MHz ICS952003 2 REF (1:0) CPU DIVDER Stop 2 2 CPUCLKT (1:0) CPUCLKC (1:0) Functionality Bit 2 Bit 7 Bit 6 Bit 5 Bit 4 CPU S...


Similar Datasheet


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)