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TC4093BF

Toshiba Semiconductor
Part Number TC4093BF
Manufacturer Toshiba Semiconductor
Description QUAD 2-INPUT NAND SCHMITT TRIGGERS
Published Nov 10, 2007
Detailed Description TC4093BP/BF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4093BP, TC4093BF TC4093B Quad 2-Input NAND Schm...
Datasheet PDF File TC4093BF PDF File

TC4093BF
TC4093BF

Overview
TC4093BP/BF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4093BP, TC4093BF TC4093B Quad 2-Input NAND Schmitt Triggers The TC4093B is a quad 2-input NAND gate having Schmitt trigger function for all the input terminals.
Since the circuit threshold voltage varies with rising time and falling time of the input waveform (VP and VN), this gate can be used for a wide variety of applications to line receivers, waveform shaping, astable multivibrators, monosatable multivibrators in addtion to regular NAND gates.
As the TC4093B and the TC4011B are identical in pin assignment, they are compatible each other.
Pin Assignment TC4093BP TC4093BF Logic Diagram Weight DIP14-P-300-2.
54 SOP14-P-300-1.
27A : 0.
96 g (typ.
) : 0.
18 g (typ.
) Start of commercial production 1978-04 1 2014-03-01 Input-Output Characteristic TC4093BP/BF Input-Output Voltage Waveform Transfer Characteristics Absolute Maximum Ratings (Note) Characteristics Symbol Rating Unit DC supply voltage Input voltage Output voltage DC input current Power dissipation Operating temperature range Storage temperature range VDD VIN VOUT IIN PD Topr Tstg VSS − 0.
5 to VSS + 20 V VSS − 0.
5 to VDD + 0.
5 V VSS − 0.
5 to VDD + 0.
5 V ±10 mA 300 (DIP)/180 (SOIC) mW −40 to 85 °C −65 to 150 °C Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction.
Using continuously under heavy loads (e.
g.
the application of high temperature/current/voltage and the significant change in temperature, etc.
) may cause this product to decrease in the reliability significantly even if the operating conditions (i.
e.
operating temperature/current/voltage, etc.
) are within the absolute maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.
e.
reliability test report...


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