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HY57V561620CLT

Part Number	HY57V561620CLT
Manufacturer	Hynix Semiconductor
Description	4 Banks x 4M x 16Bit Synchronous DRAM
Published	Dec 14, 2007
Detailed Description	www.DataSheet4U.com HY57V561620C(L)T(P) 4 Banks x 4M x 16Bit Synchronous DRAM DESCRIPTION The HY57V561620C(L)T(P) Serie...
Datasheet	HY57V561620CLT PDF File

Overview

www.
DataSheet4U.
com HY57V561620C(L)T(P) 4 Banks x 4M x 16Bit Synchronous DRAM DESCRIPTION The HY57V561620C(L)T(P) Series is a 268,435,456bit CMOS Synchronous DRAM, ideally suited for the main memory applications which require large memory density and high bandwidth.
HY57V561620C(L)T(P) Series is organized as 4banks of 4,194,304x16.
HY57V561620C(L)T(P) Series is offering fully synchronous operation referenced to a positive edge of the clock.
All inputs and outputs are synchronized with the rising edge of the clock input.
The data paths are internally pipelined to achieve very high bandwidth.
All input and output voltage levels are compatible with LVTTL.
Programmable options include the length of pipeline (Read latency of 2 or 3), the number of consecutive read or write cycles initiated by a single control command (Burst length of 1,2,4,8 or full page), and the burst count sequence(sequential or interleave).
A burst of read or write cycles in progress can be terminated by a burst termin...

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