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ASM5I961C

Part Number	ASM5I961C
Manufacturer	Alliance Semiconductor
Description	Low Voltage Zero Delay Buffer
Published	May 9, 2008
Detailed Description	July 2005 rev 0.2 Low Voltage Zero Delay Buffer Features Fully Integrated PLL Up to 200MHz I/O Frequency LVCMOS ...
Datasheet	ASM5I961C PDF File

Overview

July 2005 rev 0.
2 Low Voltage Zero Delay Buffer Features Fully Integrated PLL Up to 200MHz I/O Frequency LVCMOS Outputs Outputs Disable in High Impedance ASM5I961C reference clock while the ASM5I961P offers an LVPECL reference clock.
When pulled high the OE pin will force all of the outputs (except QFB) into a high impedance state.
Because the OE pin does not affect the QFB output, down stream clocks can be disabled without the internal PLL losing lock.
The ASM5I961C is fully 2.
5V or 3.
3V compatible and requires no external loop filter components.
All control inputs accept LVCMOS compatible levels and the outputs provide low impedance LVCMOS outputs capable of driving terminated 50...

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