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DS32EV400

National Semiconductor
Part Number DS32EV400
Manufacturer National Semiconductor
Description Programmable Single Equalizer
Published Jul 11, 2008
Detailed Description DS32EV400 Programmable Quad Equalizer October 2007 DS32EV400 Programmable Quad Equalizer General Description The DS32E...
Datasheet PDF File DS32EV400 PDF File

DS32EV400
DS32EV400

Overview
DS32EV400 Programmable Quad Equalizer October 2007 DS32EV400 Programmable Quad Equalizer General Description The DS32EV400 programmable quad equalizer provides compensation for transmission medium losses and reduces the medium-induced deterministic jitter for four NRZ data channels.
The DS32EV400 is optimized for operation up to 3.
2 Gbps for both cables and FR4 traces.
Each equalizer channel has eight levels of input equalization that can be programmed by three control pins, or individually through a Serial www.
DataSheet4U.
com Management Bus (SMBus) interface.
The equalizer supports both AC and DC-coupled data paths for long run length data patterns such as PRBS-31, and balanced codes such as 8b/10b.
The device uses differential current-mode logic (CML) inputs and outputs, and is available in a 7 mm x 7 mm 48-pin leadless LLP package.
Power is supplied from either a 2.
5V or 3.
3V supply.
Features ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Equalizes up to 14 dB loss at 3.
2 Gbps 8 levels of programmable equalization Settable through control pins or SMBus interface Operates up to 3.
2 Gbps with 40” FR4 traces 0.
12 UI residual deterministic jitter at 3.
2 Gbps with 40” FR4 traces Single 2.
5V or 3.
3V power supply Signal Detect for individual channels Standby mode for individual channels Supports AC or DC-Coupling with wide input commonmode Low power consumption: 375 mW Typ at 2.
5V Small 7 mm x 7 mm 48-pin LLP package 9 kV HBM ESD -40 to 85°C operating temperature range Simplified Application Diagram 30031924 © 2007 National Semiconductor Corporation 300319 www.
national.
com DS32EV400 Pin Descriptions Pin Name IN_0+ IN_0– IN_1+ IN_1– IN_2+ IN_2– IN_3+ IN_3– OUT_0+ OUT_0– Pin Number 1 2 4 5 8 9 11 12 36 35 33 32 29 28 26 25 37 14 23 44 42 40 38 21 I/O, Type I, CML I, CML I, CML I, CML O, CML O, CML O, CML O, CML Description Inverting and non-inverting CML differential inputs to the equalizer.
An on-chip 100Ω terminating resistor is connected between IN_0+ and IN_0-.
Inverting and non...


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