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ATxMEGA64A1

ATMEL Corporation
Part Number ATxMEGA64A1
Manufacturer ATMEL Corporation
Description (ATxMEGAxxxA1) 8/16-bit XMEGA A1 Microcontroller
Published Sep 3, 2008
Detailed Description Features • High-performance, Low-power 8/16-bit AVR XMEGA Microcontroller • Non-Volatile Program and Data Memories 64K -...
Datasheet PDF File ATxMEGA64A1 PDF File

ATxMEGA64A1
ATxMEGA64A1


Overview
Features • High-performance, Low-power 8/16-bit AVR XMEGA Microcontroller • Non-Volatile Program and Data Memories 64K - 384K Bytes of In-System Self-Programmable Flash 4K - 8K Bytes Boot Section with Independent Lock Bits 2K - 4K Bytes EEPROM 4K - 32K Bytes Internal SRAM External Bus Interface for up to 16M bytes SRAM External Bus Interface for up to 128M bit SDRAM • Peripheral Features – Four-channel DMA Controller with support for external requests – Eight-channel Event System – Eight 16-bit Timer/Counters www.
DataSheet4U.
com Four Timer/Counters with 4 Output Compare or Input Capture channels Four Timer/Counters with 2 Output Compare or Input Capture channels High-Resolution Extension on all Timer/Counters Advanced Waveform Extension on two Timer/Counters – Eight USARTs IrDA modulation/demodulation for one USART – Four Two-Wire Interfaces with dual address match (I2C and SMBus compatible) – Four SPI (Serial Peripheral Interface) peripherals – AES and DES Crypto Engine – 16-bit Real Time Counter with separate Oscillator – Two Eight-channel, 12-bit, 2 Msps Analog to Digital Converters – Two Two-channel, 12-bit, 1 Msps Digital to Analog Converters – Four Analog Comparators with Window compare function – External Interrupts on all General Purpose I/O pins – Programmable Watchdog Timer with Separate On-chip Ultra Low Power Oscillator • Special Microcontroller Features – Power-on Reset and Programmable Brown-out Detection – Internal and External Clock Options with PLL and Prescaler – Programmable Multi-level Interrupt Controller – Sleep Modes: Idle, Power-down, Standby, Power-save, Extended Standby – Advanced Programming, Test and Debugging Interfaces JTAG (IEEE 1149.
1 Compliant) Interface for programming, test and debugging PDI (Program and Debug Interface) for programming and debugging • I/O and Packages – 78 Programmable I/O Lines – 100 - lead TQFP – 100 - ball CBGA • Operating Voltage – 1.
6 – 3.
6V • Speed performance – 0 – 12 MHz @ 1.
6 – 3.
6V – 0 – 32 MHz @ 2.
7 – 3...



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